DZ128 code stuck issue during MCG init.

[Vincent_Jung]

Dear Team,

LG Chemical faced code stuck issue during MCG init.

They implemented dual MCG init code, first MCG init code runs in bootloader and second init code is executed application.

Anyway, this double time MCG initial execution occur code stuck issue during power on/off test.

The code stuck at IREFST select status check loop or PLL lock status check loop.

If use double time initialization without de-init, is it cause problem?

Below are customer codes.

Device : MC9S08DZ128

MCG init in bootloader.

MCGC2 = 0x36;   -> 0011 0110  : BDIV=0,RANGE=1,HGO=1,LP=0,EREFS=1,ERCLKEN=1,EREFSTEN=0

while ((MCGSC & 0x02u) != 0x02u) {}   -> OSCINIT=1

MCGC3 = 0x11; -> 0001 0001 : LOLIE=0,PLLS=0,CME=0,DIV32=1,VDIV=0001

MCGC1 = 0x90; -> 1001 0000 : CLKS=10,RDIV=010,IREFS=0,IRCLKEN=0,IREFSTEN=0

while ((MCGSC & 0x10u) == 0x10u) {}    -> IREFST=1

while ((MCGSC & 0x0Cu) == 0x0Cu) {}    -> CLKST=11

MCGC3 = 0x52; -> 0101 0010 : LOLIE=0,PLLS=1,CME=0,DIV32=1,VDIV=0010

while((MCGSC & 0x20u) == 0x20u) {}     -> PLLST=1

while((MCGSC & 0x40u) == 0x40u) {}     -> LOCK=1

MCGC1  = 0x10; -> 0001 0000 : CLKS=00,RDIV=010,IREFS=0,IRCLKEN=0,IREFSTEN=1

while((MCGSC & 0x0Cu) == 0x0C) {}      -> CLKST=11

MCG init in application.

MCGTRM = 0xFFAF;

MCGSC = 0xFFAE;

MCGC2 = 0x36;    /* MCGC2: BDIV=0,RANGE=1,HGO=1,LP=0,EREFS=1,ERCLKEN=1,EREFSTEN=0 */

MCGC3 |= 0x10;   /* MCGC3: DIV32=1 */

MCGC1 = 0x98;    /* MCGC1: CLKS=2,RDIV=3,IREFS=0,IRCLKEN=0,IREFSTEN=0 */

MCGC3 = 0x12;    /* MCGC3: LOLIE=0,PLLS=0,CME=0,DIV32=1,VDIV=2 */

MCGT = 0x00;     /* MCGT: DMX32=0,DRST_DRS=0 */

While (!MCGSC_OSCINIT) {}   // wait until external reference is stable

While (MCGSC_IREFST) {}     // wait until external reference is selected (1) Code stuck point 1

While ((MGCSC & 0x0C) != 0x08) {}  // wait until external clock is selected as a bus clock reference

MCGC2 = 0x3E;   /* MCGC2: BDIV=0,RANGE=1,HGO=1,LP=1,EREFS=1,ERCLKEN=1,EREFSTEN=0 */

MCGC1 = 0x90;   /* MCGC1: CLKS=2,RDIV=2,IREFS=0,IRCLKEN=0,IREFSTEN=0 */

MCGC3 &= ~0x10; /* MCGC3: DIV32=0 */

MCGC3 = 0x42;    /* MCGC3: LOLIE=0,PLLS=1,CME=0,DIV32=0,VDIV=2 */

While (!MCGSC_PLLST) {}     // wait until PLL is selected

MCGC2 &= ~0x08;   /* MCGC2: LP=0 */

While (!MCGSC_LOCK) ()     // wait until PLL is locked (2) Code stuck point 2

MCGC1 = 0x10;      /* MCGC1: CLKS=0,RDIV=2,IREFS=0,IRCLKEN=0,IREFSTEN=0 */

While ((MCGSC & 0x0C) != 0x0C) {}  // wait until PLL clock is selected as a bus clock reference

[john_suchyta]

Hi Vincent,

Thanks for getting the crystal frequency (8MHz). The 2 sections of code are different (written by 2 different authors?) and suggested a 4MHz crystal in the boot and 8MHz in the main. The boot code has 2 errors (checks for wrong value of CLKST in FBE and does not clear DIV32 for RANGE=1 when the PLL is used (new DS change)). The main app has many statements out of sequence and with incorrect values. Rather than commenting on each line, I attached a file that has the recommended statements that match up with the datasheet example for PEE. Here are 2 solutions for the boot code and the app code (using their conventions) that give 8MHz PEE bus frequency with an 8MHz crystal.

Regards,

John

Boot: 8MHz Bus (PEE) with 8MHz crystal

MCGC2 = 0x36;   -> 0011 0110  : BDIV=0,RANGE=1,HGO=1,LP=0,EREFS=1,ERCLKEN=1,EREFSTEN=0

while ((MCGSC & 0x02u) != 0x02u) {}   -> OSCINIT=1

MCGC3 = 0x11; -> 0001 0001 : LOLIE=0,PLLS=0,CME=0,DIV32=1,VDIV=0001

MCGC1 = 0x98; ->1001 1000 : CLKS=10,RDIV=011,IREFS=0,IRCLKEN=0,IREFSTEN=0 (DIV32:RDIV=>/256)

while ((MCGSC & 0x10u) == 0x10u) {}    -> IREFST=1

while ((MCGSC& 0x0Cu) == 0x08u) {}    -> CLKST=10

MCGC3 = 0x44; ->0100 0100 : LOLIE=0,PLLS=1,CME=0,DIV32=0,VDIV=0100

while((MCGSC & 0x20u) == 0x20u) {}     -> PLLST=1

while((MCGSC & 0x40u) == 0x40u) {}     -> LOCK=1

MCGC1  = 0x18; ->0001 1000 : CLKS=00,RDIV=011,IREFS=0,IRCLKEN=0,IREFSTEN=0

while((MCGSC & 0x0Cu) == 0x0C) {}      -> CLKST=11

Application: 8MHz Bus (PEE) with 8MHz crystal

MCGTRM = 0xFFAF;

MCGSC = 0xFFAE;

MCGC2 = 0x36;    /* MCGC2: BDIV=0,RANGE=1,HGO=1,LP=0,EREFS=1,ERCLKEN=1,EREFSTEN=0 */

While (!MCGSC_OSCINIT) {}   // wait until external reference is stable

MCGC3 |= 0x10;   /* MCGC3: DIV32=1 */

MCGC1 = 0x98;    /* MCGC1: CLKS=2,RDIV=3,IREFS=0,IRCLKEN=0,IREFSTEN=0 */

While (MCGSC_IREFST) {}     // wait until external reference is selected

While ((MGCSC & 0x0C) != 0x08) {}  // wait until external clock is selected as a bus clock reference

MCGC2 = 0x3E;   /* MCGC2: BDIV=0,RANGE=1,HGO=1,LP=1,EREFS=1,ERCLKEN=1,EREFSTEN=0 */

MCGC3 = 0x44;    /* MCGC3: LOLIE=0,PLLS=1,CME=0,DIV32=0,VDIV=4*/

MCGC2 &= ~0x08;   /* MCGC2: LP=0 */

While (!MCGSC_PLLST) {}     // wait until PLL is selected

While (!MCGSC_LOCK) {}     // wait until PLL is locked

MCGC1 = 0x18;      /* MCGC1: CLKS=0,RDIV=3,IREFS=0,IRCLKEN=0,IREFSTEN=0*/

While ((MCGSC & 0x0C) != 0x0C) {}  // wait until PLL clock is selected as a bus clock reference

/* now in PEE with 8MHz crystal, fpll_ref=1MHz, fbus=8MHz */