The disassembled sample is fairly cryptic, I suspect not being correctly formatted with too many line feeds.
No istruction in this sample is longer than 4 cycles (CPX opr16a)
L9D and L4A are alternate labels for testCh21: and testCh22
It seems to me that [5] is the alternate clock counting to reach the label when the branch is not performed and the intermediate instruction (ORA #opr8i) is done.