COP's Timing Source

[Luigi]

I was wondering where the COP gets its time base.  It looks like it uses the system clock (maybe BUSCLK?) and has taps at 2^13 and 2^18 for detecting timeout.  So, if my clock system is based on the an external crystal and it somehow quits, the micro will not get a COP reset, right?

I came from a project which used a different micro and, with the right amount of noise, it would lock up the oscillator circuit, and the WDT along with it.  Oddly enough, taking the reset pin low would pull it out of its state and restart normally.  I was hoping this processor might be based on an internal RC oscillator or something, but it looks like it is also based on the external crystal, right?

[peg]

Hi Luigi,

You really should mention what MPU you are talking about, preferably in the subject line.

That way everyone is not just guessing.

Some devices offer the choice of an interrupt OR reset on loss of lock of the FLL.

(Keeping the dream alive)

Message Edited by peg on 2007-04-3008:38 AM

[bigmac]

Hello Luigi,

For many devices, there is loss of clock detection that will cause reset should the external crystal fail.  When the COP timer uses the system clock you won't get COP timeout, but a reset should still occur by this other means.

Regards,

Mac

[tonyp]

For some parts, like the QG for example, the COP can be set to use an internal 1KHz clock.  For others, like the GB, COP is based only on the bus (but in this case I think you can use the ICG to reset on loss of lock for certain modes at least, not sure).