## 9SO8QG8 CLOCK

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## 9SO8QG8 CLOCK

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Contributor I
hi

Í'm testing a 9S08QG8 by first time  with a 4MHz oscillator in FBE mode.

On Data sheet  and other freescale documents
fbus=(fext*1/BDIV)/2  = 1/tcyc    where tcyc is time machine cycle

I used BDIV=1 ==> divide by 2
Then fbus=4MHz/4=1MHz ==> tcyc=1us

I tryed to check this,  generating a square wave with

C code                                                                            Assembler code

for(;   {      PTBD_PTBD2=1;                                                     44:       PTBD_PTBD2=1;                                                                                       0014    1400    BSET  2,_PTBD          //2 cycles      _asm NOP                                                                45:       _asm NOP                                                                                       0016     9d       NOP                              //1 cycle      PTBD_PTBD2=0;                                                     46:       PTBD_PTBD2=0;                                                                                       0017    1500     BCLR  2,_PTBD          //2 cycles     _asm NOP                                                                 47:      _asm NOP                                                                                        0019    9d         NOP                            //1 cycle
__RESET_WATCHDOG(); // feeds the dog   } // loop forever

If tcyc is  1 us I would have to obtain a 3 us period square wave but I obtain a 6 us period.
Maybe fext is fcrystal/2 and this information is not well documented or tcyc is not 1/fbus.
Maybe some of you with more experience have a response.
I regulary use 9S12,  GP32 and QT2 MCUs and I never had this discrepancy.
Best Regard
Labels (1)
• ### General

4 Replies
93 Views
Contributor II
Hello,
I wrote your code and tested it,

void qc8intosc(void) {
SOPT1_COPE = 0;//turn off the watchdog
PTBDD_PTBDD6 = 1;

for(; {     //this loop takes 13 clock cycles to execute
PTBD_PTBD6 = 1;
PTBD_PTBD6 = 0;
} /* loop forever */
}
It will oscillate at 304 kHz.
As the loop takes 13 clocks to execute, this means that the fOP is 13 * 304 kHz = 3.95 MHz.

I have not got an external oscillator, so I cannot test your conditions, but maybe this helps?

Regards,
Ake

93 Views
Contributor I
Ake, Bigmac Thank both for your time thinking about my doubts. The solution is that BSET or BCLR use 5 cycles not 2 cycles. I thought that each opcode and each operand corresponds to a cycle. That occurs when you do not consult the manual!!!!!!!! Best Regards
Eugenio

93 Views
Specialist III
Hello,

Further to the comments by Ake, the number of cycles required by BSET or BCLR instructions will be 5 cycles, and not 2 cycles.  Additionally, you did not allow for __RESET_WATCHDOG() macro, (assume 4 cycles), and for a BRA instruction to provide a continuous loop (3 cycles).  This would mean that your code should loop every 19 cycles, (assuming no interrupts).  Because of the additional overheads, the waveform will be asymmetric.

Regards,
Mac

93 Views
Contributor I
Ake, Bigmac