9S08QG8 CLOCK AGAIN

cancel
Showing results for 
Search instead for 
Did you mean: 

9S08QG8 CLOCK AGAIN

894 Views
euge
Contributor I
Hi
I'm testing the 9S08QG8
If I use a external crystal and generate a square wave I get a perfect wave.
 
for(;:smileywink: {
 PTBD_PTBD2=1;        //bset
_asm NOP
PTBD_PTBD2=0;       //bclr
 _asm NOP
__RESET_WATCHDOG();  // feeds the dog
}
 
 
But when I try to generate the same square wave with the internal clock the period have a
variation of 20 to 30 %.
I note that because using a digital osciloscope (TEK 210) is not easy to syncronize the wave.
You see successive periods increasing and decreasing its size
May be this variations are normal using the internal clock.
If I understood the trim procedure  if for to achieve  an exactly frecuency but not for to achieve stability
 
 
Someone made this experience?
For example Someone could comunicarce with SCI using the internal oscillator?
Best Regards
Eugenio
 
Labels (1)
0 Kudos
1 Reply

85 Views
bigmac
Specialist III
Hello Eugenio,
 
I will assume that you select FBE mode when running the crystal (not FEE mode), and FEI when using the internal clock.  The operation of the FLL will give jitter dependent on the relationship between the clock frequency (internal or external) and the bus frequency.  The datasheet specifies a maximum 0.2 percent average value over a 2 ms interval. The average jitter for shorter intervals would be correspondingly higher.
 
For your test code, the averaging period is only a few microseconds, so may well account for the jitter you are observing.
 
For applications where jitter is critical, the FLL cannot be used.  Another approach is to use a higher frequency external crystal (perhaps 4 MHz, or thereabouts) in FEE mode, to generate the bus clock (complete with jitter).  For the timing critical events, TPM interrupts are used, with the external clock selected as the TPM clock source.  The interrupt events would not be subject to the FLL jitter.
 
For SCI operation, the bit period should normallly be sufficiently long that jitter will not represent a problem.  If my calculation is correct, I would estimate a worst case of about 7 percent jitter at 19200 baud.
 
Regards,
Mac
 


Message Edited by bigmac on 2008-01-12 02:52 PM
0 Kudos