[T1040D4RDB] "Error: No valid SPD detected" after a flash

[nicolaskury]

Hi

I flashed rcw, fman and uboot from bank0 (for bank 4) and then, when I switch to bank 4, I got this error

cpld reset altbank

Board: T1040D4RDB

Board rev: 0x01 CPLD ver: 0x09, vBank: 4

I2C:   ready

SPI:   ready

DRAM:  Initializing....using SPD

DIMM 0: is not a DDR4 SPD.

Error: No valid SPD detected.

*** failed ***

initcall sequence effc0b6c failed at call eff4d2d0 (err=1)

### ERROR ### Please RESET the board ###

The commands I used (from bank 0)

tftp 1000000 sdk1.8_default/rcw/RR_P_66/rcw_1400MHz.bin

protect off 0xec000000 +$filesize

erase 0xec000000 +$filesize

cp.b 1000000 0xec000000 $filesize

protect on  0xec000000 +$filesize

tftp 1000000 sdk1.8_default/fsl_fman_ucode_t1040_r1.0_107_4_2.bin

protect off 0xebf00000 +$filesize

erase 0xebf00000 +$filesize

cp.b 1000000 0xebf00000 $filesize

protect on 0xebf00000 +$filesize

tftp 1000000  sdk1.8_default/u-boot-T1040D4RDB.bin

protect off 0xebf40000 +$filesize

erase 0xebf40000 +$filesize

cp.b 1000000 0xebf40000 $filesize

protect on 0xebf40000 +$filesize

is there something I did wrong ?

Should I flash hv.bin and hv-2p-lnx-lnx.dtb ?

Thank you

[ufedor]

1) Please provide the bank 0 booting log

2) Please try to use the binaries from the SDK 1.9

[nicolaskury]

Hi!

Here the booting log from bank 0

U-Boot 2014.07QorIQ-SDK-V1.7+g659b6a2 (Dec 13 2014 - 18:00:52)

CPU0:  T1040E, Version: 1.1, (0x85280011)

Core:  e5500, Version: 2.1, (0x80241021)

Clock Configuration:

       CPU0:1400 MHz, CPU1:1400 MHz, CPU2:1400 MHz, CPU3:1400 MHz,

       CCB:600  MHz,

       DDR:800  MHz (1600 MT/s data rate) (Asynchronous), IFC:150  MHz

       QE:300  MHz

       FMAN1: 600 MHz

       QMAN:  300 MHz

       PME:   300 MHz

L1:    D-cache 32 KiB enabled

       I-cache 32 KiB enabled

Reset Configuration Word (RCW):

       00000000: 0c18000e 0e000000 00000000 00000000

       00000010: 66000002 40000002 ec027000 01000000

       00000020: 00000000 00000000 00000000 00030810

       00000030: 00000000 0342580f 00000000 00000000

Board: T1040RDB

Board rev: 0x01 CPLD ver: 0x09, vBank: 0

I2C:   ready

SPI:   ready

DRAM:  Initializing....using SPD

Detected UDIMM 18KSF51272AZ-1G6K1

4 GiB (DDR3, 64-bit, CL=11, ECC on)

       DDR Chip-Select Interleaving Mode: CS0+CS1

Flash: 256 MiB

L2:    256 KiB enabled

Corenet Platform Cache: 256 KiB enabled

Using SERDES1 Protocol: 102 (0x66)

NAND:  1024 MiB

MMC:   FSL_SDHC: 0

Not a microcode

PCIe1: Root Complex, no link, regs @ 0xfe240000

PCIe1: Bus 00 - 00

PCIe2: Root Complex, no link, regs @ 0xfe250000

PCIe2: Bus 01 - 01

PCIe3: Root Complex, no link, regs @ 0xfe260000

PCIe3: Bus 02 - 02

PCIe4: Root Complex, no link, regs @ 0xfe270000

PCIe4: Bus 03 - 03

In:    serial

Out:   serial

Err:   serial

Net:   Initializing Fman

Fman1: Uploading microcode version 107.4.2

FSL_MDIO0:0 is connected to FM1@DTSEC1.  Reconnecting to FM1@DTSEC2

FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5

Hit any key to stop autoboot:  0

In my documentation, there is written:

"By default, the NOR Flash vbank 0 contains the image for T1040 silicon. The Nor flash vbank 4 contains the image for T1042 silicon".

So I don't know if it could be the reason...

I will try with binaries from sdk 1.9

Thank you!

[ufedor · Accepted solution]

The log shows that the board is equipped with DDR3 SDRAM.

Please note that the latest SDK supporting T1040RDB (with DDR3 SDRAM) is 1.7.

Further versions of SDK (1.8 and 1.9) support T1040D4RDB equipped with DDR4 SDRAM - refer to the SDK Documentation:

Submit Form

[nicolaskury]

Thank you. I flashed with the binaries of SDK 1.7 and it fixed the problem