i.MX8QXP FLEXCAN1 not working

[mosaddek_hossai]

Hallo NXP Community,

I have successfully configured FlexCAN0 in M4, and it is working perfectly.

The problem occurs when I want to configure FlexCAN1. 

In the Reference manual for CAN0 , CAN1 and CAN2, they all use the same clock gate.

Each CAN module is assigned to different LPCG_REGS. The driver code from Imx8qxp SDK CM4, As shown below: 

kCLOCK_DMA_Can0 = LPCG_TUPLE(SC_R_CAN_0, ADMA__LPCG_CAN0_IPG_CLK_BASE),
kCLOCK_DMA_Can1 = LPCG_TUPLE(SC_R_CAN_1, ADMA__LPCG_CAN1_IPG_CLK_BASE),
kCLOCK_DMA_Can2 = LPCG_TUPLE(SC_R_CAN_2, ADMA__LPCG_CAN2_IPG_CLK_BASE),

The Function in M4 try to enable the clock in CM4 for FlexCAN1 using kCLOCK_DMA_Can1: 

/* Enable FlexCAN clock. */
CLOCK_EnableClock(s_flexcanClock[instance]);
/*

Then the Function Below try to verify the kCLOCK_DMA_Can1 resource with SCFW

/*!

• brief Enable the clock for specific IP, with gate setting.
  *
• param name Which clock to enable, see \ref clock_ip_name_t.
• param gate 0: clock always on, 1: HW auto clock gating.
• return true if success, false if failure.
  */

err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate);

Then it returns an error message: -->SC_ERR_UNAVAILABLE 6U /!< Unavailable (out of resources) /

This means the m4 tries to communicate with SCFW for VALID resouce or dma_clock for CAN1, and this instance is missing in SCFW.

In SCFW only CAN0 was assigned with Clock 

The reason for this failure is when CAN1 is enabled it tries to enable the clock gate with kCLOCK_DMA_Can1 . This is not being implemented in SCFW.

--First I configured CAN0 ,

After that CAN1 ,

Then again CAN1 has the same error.

Is there any valid solution for CAN0 and CAN1 in M4 to run parallely?

Kind Regards,

Hossain

[Zodiac]

The flexcan on 8QX is implemented as below :

• Power domain of CAN1/CAN2 is the child domain of CAN0's
• FlexCAN0,CAN1/CAN2 share the clock root, SCFW provides CAN0 clock control list(interface) only to enable or disable the clock.

So

• when use CAN1/CAN2 you need to power on CAN0 as well, take CAN1 for exampe :
  

    if (sc_pm_set_resource_power_mode(ipc, SC_R_CAN_0, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
    {
        PRINTF("Error: Failed to power on FLEXCAN0\r\n");
    }
        if (sc_pm_set_resource_power_mode(ipc, SC_R_CAN_1, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
    {
        PRINTF("Error: Failed to power on FLEXCAN1\r\n");
    }​

• Flexcan clock table should all set to CAN0 in fsl_clock.h as below , as scfw only provides control interface for CAN0, the new package for 8QX will be available soon with the patch.
  

#define FLEXCAN_CLOCKS                                     \
    {                                                      \
        kCLOCK_DMA_Can0, kCLOCK_DMA_Can0, kCLOCK_DMA_Can0, \
    }

Please have a try.

[igorpadykov]

Hi MD Mosaddek Hossain

example of FelxCan (SC_P_FLEXCAN0_) resource change can be found in tutorial

System Controller Firmware 101 - Resource management service 

please use sc_fw_api_qx_b0.pdf included in SCFW Porting Kit

Best regards
igor
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[mosaddek_hossai]

Hello Igor,

Thanks a lot for your reply. The resouce list has CAN_1 as you have mentioned in your reply, I have also initialized the resources for CAN_0 and CAN_1 for m4 in SCFW:

SCFW:

BRD_ERR (rm_set_resource_movable( pt_boot, SC_R_CAN_0, SC_R_CAN_1,
SC_TRUE));

The screenshot that I provided is also from sc_fw_api_qx_b0.pdf but from CLOCK list:

CM4:

Test 1 )

Initialize CAN0

CAN0 :- working 

Flex_CAN0 is working perfectly.

Test 2) 

Flex_CAN1:

Initialize CAN1

CAN1 :-  not working 

Initialized CAN1 in similar way as CAN_0. Does not work. As it cannot enable clock for FLEXCAN_1

When sc_pm_clock_enable function tries to enable the clock Gate, it sends an error "6" -> Unavailable (out of resources)

Test 3)

Initialize CAN0 resource first , Then CAN1 resource and initialize Flexcan_init with FLEXCAN1.

As mentioned in another thread: https://community.nxp.com/message/1313876?commentID=1313876#comment-1313876 to enable both resources CAN_0 and CAN_1 

Quote from jimmychan‌

> "This will enable the clock as well, but if you use SC_R_CAN_1, I don't believe the clock will get enabled, which also explains why when you initialize CAN_0, CAN_1 then works."

I have also tried it --> 

#if defined(BODY_FLEX_CAN)

if (sc_pm_set_resource_power_mode(ipc, SC_R_CAN_0, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
{
PRINTF("Error: Failed to power on FLEXCAN\r\n");
}

if (sc_pm_set_resource_power_mode(ipc, SC_R_CAN_1, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
{
PRINTF("Error: Failed to power on FLEXCAN\r\n");
}
#endif

if (sc_pm_set_resource_power_mode(ipc, SC_R_IRQSTR_M4_0, SC_PM_PW_MODE_ON) != SC_ERR_NONE)
{
PRINTF("Error: Failed to power on IRQSTR\r\n");
}

Also the clock does not work, FLEX_CAN1 failed to initialize. 

Test 4):

Initialize CAN0 and then CAN1

Initialize CAN_0 :-> 

Flex_CAN_0 --> kclock_DMA_CAN0 --> initialized successfully

 CAN0 :- working properly

After initialization of CAN0, initialize CAN1. It FAILS

Flex_CAN_1--> kclock_DMA_CAN1 --> initialization Failed

CAN1 :- NOT working in M4 imx8qxp

[mosaddek_hossai]

Hallo Igor,

Found a bug in the driver: [fsl_flexcan.h]
FIX: -->  kCLOCK_DMA_Can1 = LPCG_TUPLE(SC_R_CAN_0, ADMA__LPCG_CAN1_IPG_CLK_BASE), /*CHanged  the SC_R_CAN_1 --> SC_R_CAN_0 source*/
Now the clock is enabled for ADMA__LPCG_CAN1_IPG_CLK_BASE

• But still the CAN1 is not enabled
  

  base->MCR |= CAN_MCR_MDIS_MASK;

  Error : /* Wait FlexCAN enter low-power mode. */
  while (0U == (base->MCR & CAN_MCR_LPMACK_MASK))

Kind Regards,

Hossain