This describes how to perform frequency measurements of an external signal by using the Camera Sensor Interface (CSI) of an i.MX21/25/35 processor.
A way to measure the frequency of a digital signal is to count the number of received rising or falling edges during a known amount of time.
The CSI embeds a 16-bit frame counter. When programmed in non-gated clock mode, this counter increases at any rising edge on the VSYNC signal.
Other signals of this interface could be ignored such: MCLK, PIXEL_CLK, HSYNC, DATA.
- Software example for the i.MX25:
unsigned int tmp_value = 0;
/* It assumes that the VSYNC I/O is set to CSI mode */
/* Disable IPG_PER_CSI to save power consumption */
*((unsigned int *) CCM_CGR0) &= ~(0x1<<0);
/* HCLK_CSI and IPG_CLK_CSI should be enabled. */
*((unsigned int *) CCM_CGR0) |= (0x1<<18);
*((unsigned int *) CCM_CGR1) |= (0x1<<4);
/* Configuration of CSI_CSICR1 in non-gated clock mode */
tmp_value = 0;
tmp_value |= (1<<8); // sync FIFO clear
tmp_value |= (1<<30); // ext vsync enable
*((unsigned int *) CSI_CSICR1) = tmp_value;
// Reset frame counter
*((unsigned int *) CSI_CSICR3) |= (1<<15);
Then, every T seconds, the software has to read the register CSI_CSICR3. The 16-bit size field from bit 16 shows the current value of the frame counter (FRMCNT).
This regular or irregular read could be done based on a GPT to have a known time reference.
It is easy to calculate the frequency of the signal: Frequency = FRMCNT / T (Hz).
At any time, the frame counter can be reset thanks to the bit 15 of the register CSI_CSICR3.
- MCLK does not need to be enabled.
- The input frequency should not be higher than what can electrically support the VSYNC input.
- Please, refer to each i.MX datasheet for more information.