Enable Stopindebug bit for PIT and STM module.
Counter could be stop when debug project, but when i set debug mode on, counter not count, project can't be run.
In order for PIT timer to count when a FRZ bit is enabled, all cores on S32V23x devices need to be running. The reason why it does not work out of the box with current plugin configuration, is because we halt all device cores, which is especially necessary for RAM based projects.
We created a start-up macro to keep all cores running when S32V232M80 or S32V234M100 debug sessions are launched. In order to use it, please go to the following directory without your S32DS3.2 IDE: eclipse\plugins\com.pemicro.debug.gdbjtag.pne_22.214.171.124909091700\win32\gdi\P&E\supportFiles_ARM\NXP\S32Vxxx.
Please rename S32V234M100_All_Cores_Running.mac or S32V232M80_All_Cores_Running.mac to default macro names, saving existing default macros in renamed form, or a separate location: S32V234M100.mac or S32V232M80.mac.separate location: S32V234M100.mac or S32V232M80.mac.