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* Detailed Description:
* This example initializes SMPU_0 and SMPU_1 to cover all memory resources for
* all masters.
* Simple test is performed in this example: after initialization, SMPU_1
* configuration is changed to disable write access to last 4kB of RAM for
* Process ID 1. Write acess is allowed for Process ID 0.
* If this area is written by CPU while the Process ID is 1, exception will
* occur due to access violation.
* ------------------------------------------------------------------------------
* Test HW: MPC574XG-324DS Rev.A + MPC574XG-MB Rev.C
* MCU: PPC5748GMMN6A 1N81M
* Fsys: 160 MHz PLL
* Debugger: Lauterbach Trace32
* Target: internal_FLASH
*
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