Example MPC5602D FMPLL GHS614

File uploaded by Peter Vlna Employee on Aug 2, 2016Last modified by Diana Torres on Feb 24, 2017
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* Detailed Description:

* Application performs basic initialization, setup PLL to maximum allowed frequency (48MHz)

* Setup SIU, and demonstrate frequency modulation.

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* Test HW:        XPC560B 64LQFP, XPC56XX EVB MOTHEBOARD Rev.C

* MCU:             SPC5602D

* Cut:               1M18Y

* Fsys:             48 MHz

* Debugger:     Lauterbach Trace32

* Target:           internal_FLASH

* EVB clkout pin : Port J7 - pin 0

*

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