The FXLN83XX is a 3-axis, low-power, low-g accelerometer along with a CMOS signal conditioning and control ASIC in a small 3 x 3 x 1 mm QFN package. The analog outputs for the X, Y, and Z axes are internally compensated for zero-g offset and sensitivity, and then buffered to the output pads. The outputs have a fixed 0 g offset of 0.75 V, irrespective of the VDD supply voltage. The bandwidth of the output signal for each axis may be independently set using external capacitors. The host can place the FXLN83XXQ into a low-current shutdown mode to conserve power.
Here is a Render of the FXLN83XX Breakout Board downloaded from OSH park:
Layout Design for this board:
In the attachments section, you can find the Schematic Source File (SCH), Schematic PDF File, Layout Source File (BRD), Gerber Files (GTL, GBL, GTS, GBS, GTO, GBO, GKO, XLN) and BOM files.