Michael Predko

Can somebody explain why PORTTD is "dreaded"?

Discussion created by Michael Predko on Sep 5, 2010
Latest reply on Oct 13, 2010 by Michael Predko

Hi Folks,

 

I'm working with the MCF52223, trying to get the PWMs working under MQX and I'm trying to figure out some discrepancies I am finding in the manual as well as MQX. 

 

If I look at Table 2.1 in the Reference Manual, it indicates that the GPT3:0/PWM7,5,3,1 map to a GPIO pin as their quaternary function.  Jumping to Figure 12-1, they are listed as being on PORTTD BUT, in the rest of section 12, there is no mention of any registers for TD.  Nor is there any reference to a "PTDPAR" register in table A3, the register list at the end of the RM.  Similarly, when I go through the MQX source code for the gpio device drivers, there is no reference to these GPIOs or PORTTD. 

 

In section 26.1 of the RM there is the Note: "The GPIO module must be configured to enable the peripheral function of the appropriate pins (refer to Chapter 12, "General Purpose I/O Module") prior to configuring the PWM module." which leads me to believe I have to write to the PTDPAR register. 

 

When I look through the forums, I see a comment about PORTTD being "dreaded" but I can't find any other information. 

 

Could somebody please explain what are the issues with PORTTD and whether or not I can use PWM 7, 5, 3, 1 as is, and how do I ensure the Quad Function Pin Assignment Register for PORTTD (PTDPAR - which I can't find any reference of other than the ones cited above) will output a PWM signal as required? 

 

Thanx,

 

myke

Outcomes