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QN9080 - using ADC and CTIMER

Question asked by Shai Berman on Apr 29, 2020
Latest reply on May 14, 2020 by Mario Ignacio Castaneda Lopez

Hello Team,

My customer has the following inquiries below: 

 

We need to sample two analog channels with 12 bits at a sample rate of Fs (Fs is in the range
of 500Hz to 10KHz). Our application needs to store N samples (N is in the range of 100 to
1000).
We are using the QN9080 with an internal clock of 32MHz.
We made two tests :
1) With basic and minimal instructions we toggle an IO when configuring the processor
with maximum speed.
In this test, we expected to have an output frequency of at least 5MHz (we expected that each
loop would take no more than 100nSec).
We got a result of 400KHz which means that each loop took about 1250nSec (12.5 times
slower).
Attached please find the software that we built and the confirmation of the processor
(led_test.zip)
a. Please advise.
b. Alternatively, please provide us a short program that can demonstrate a
toggling IO of at least 5 MHz.
2) We programmed a CTIMER triggered interrupt to trigger the ADC to perform a single
sampling every T seconds (T is in the range of 2mSec down to 100nSec).
In addition,
Upon each CTIMER interrupt (which triggered ACD start sample) - we toggled 1st IO -
please find the BLUE channel in Picture 1 and Picture 2
Upen each ADC end of conversion (ACD ready status) - we toggled a 2nd IO - please
find the YELLOW channel in the Picture 1 and Picture 2
Our conclusions from the results are that the ADC conversion time is about 2 mSec (we
need 100uSec).
Attached please find the software that we used.
Attached source code project file name: adc_test.zip


a. Please advise.
b. Alternatively, please provide a short program that interrupts the ADC
every 100nSec and the ADC results are stored in the memory for example 100
samples.
Picture 1:

Picture 2:

I would appreciate your support, thanks in advance.

 

Kind regards,

Shai

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