AnsweredAssumed Answered

Setting CLK_OSC32M_DIV to 0 results in runtime error

Question asked by sharon urban on Apr 8, 2020
Latest reply on Apr 29, 2020 by Sebastián Del Río



I am trying to set the CLK_OSC32M_DIV bit of the System Clock Divider Register to 0, in order to use the original 32 MHz clock, undivided.


After importing from the "GPIO led output" SDK example project, I am trying to change this line: 


CLOCK_SetClkDiv(kCLOCK_DivOsc32mClk, 1U);

Into this line:


CLOCK_SetClkDiv(kCLOCK_DivOsc32mClk, 0U);


This results in a runtime error.

What could be going wrong here?