i.mx6 dual with (2) MT41K256M16 DDR3L

[dmatthews]

Hello,

We are planning on configuring an i.mx6 dual with (2) MT41K256M16 DDR3L memories.  I can't find an eval version with this configuration; most have 4 devices.  I have just a few simple connections to verify:

1.  It appears that the two SDCLKs from the i.mx6 are identical so I should be able to connect one to each DDR chip for routing purposes, correct?  Normally, with 4 DDR chips each clock is connected to two DDR chips.

2.  When using the two SDCLKs, one for each DDR chip, I should use the corresponding SDCKE, correct? So SDCLK0 gets SDCLKE0, and SDCLK1 gets SDCLKE1.

3.  Should ODT0 and ODT1 be routed to both DDR chips, or simply use ODT0 for both?

Thanks for responding!

[Yuri]

Hello,

  Generally signals CS0, ODT0, SDCKE0 relate to the CS0 channel ;

signals CS1, ODT1, SDCKE1 relate to the CS1 channel.

   Clock signals SDCLK0 and SDCLK1 in default state are the same and can be used

for both CS0 or CS1 channels if this makes easier PCB design.

  So, if both MT41K256M16 parts are connected in parallel in order to form 32-bit data

port - use common CS0, ODT0, SDCKE0, SDCLK0 for both.

Have a great day,
Yuri

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