My 25MHz SPI master application (CPOL=0,CPHA=0) is seeing occasional errors in the received data from the slave.
MISO data from the slave to the MKS22 only has ~10ns setup time to the rising clock edge which is less than the specified 16ns required.
Simple solution would seem to be to enable Modified Transfer Format to delay the MKS22 sample of SIN by Tsys.
Setting the MTFE bit in MCR however breaks communication completely.
We're using two 16 bit transfers per transaction and using the CONT flag to make 32 bits per CS.
With MTFE set we get two 17 bit transfers!!
This is the only code change:
// SPI0_MCR = SPI_MCR_MSTR_MASK | SPI_MCR_PCSIS(0b11111) | SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK | SPI_MCR_HALT_MASK;
SPI0_MCR = SPI_MCR_MSTR_MASK | (1<<26) | SPI_MCR_PCSIS(0b11111) | SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK | SPI_MCR_HALT_MASK;