I have read many entries on this forum about enabling a 50 MHz clock for use with a RMII ethernet PHY. I don't think I have anything special in my setup.
What I have noticed is that the clock is gated off at startup, and nothing ever enables it. This is on the rel_imx_4.9.88_2.0.0_ga kernel, plus the changes from toradex to set the enet1 ref clock output enable bit in the IOMUX GPR1.
After boot, communication via MDIO works, but the PHY doesn't see a link. Reading CCM_TARGET_ROOT78:
# devmem 0x3038A700
Note the enable bit (0x10000000) is off for ENET1_REF_CLK_ROOT.
If I turn it on:
# devmem 0x3038A700 32 0x12000000
fec 30be0000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
Everything is great.
So, what is supposed to be ungating that clock? None of the devtree examples I have seen use it.
Any help would be appreciated!
Some reference links I have read:
devtree is as follows: