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The LP SNVS RTC in the iMX6ULL what is the story about it?

Question asked by Henri de Veer on Nov 14, 2018
Latest reply on Nov 15, 2018 by Henri de Veer

According to this thread: the LP RTC does not exist in the i.MX6ULL.
Well, I observed that in the datasheet the registers LPSRTCMR (offset 0x50) and LPSRTCLR (offset 0x54) indeed are not present/documented (they are documented in the i.MX6UL).


This thread also mentions the use of the RTC for the ULL, but not that it doesn't exist:


But now the fun part: If I readout those registers they seem to work, also the rtc-snvs driver looks to be working.
So it seems the LP RTC is present in the ULL (at least the one I have: MCIMX6Y2CVM08AA =industrial 792 MHz).
What I also saw is that the imx6ull.dtsi still contains the section "snvs-rtc-lp".
I would expect that it would have been removed when this RTC is absent?
So why was that not removed from the dtsi if its absent? (We use the linux-imx_4.1.15 branch)

So my questions:
- Why is this working?
- Is it a documentation error and the LP RTC is available as intended?
- Is is a chip design issue that it was forgotten to remove the functionality of from the chip itself?
- Is there a plan to remove the LP RTC from the chip in a future version?
It all boils down to the question: When I start using the LP RTC how big is the risk that in a newer production batch the LP RTC will "vanish"?





Note: Since probably nobody is going to read a closed/answered thread (456977) I opened this new question on this subject. I will refer to this question in the other thread and remove it there.


And by the way: There is no Category for i.MX6ULL, only the i.MX6UL to select for posting questions!