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ADC Access Failing when Optimized (-O != 0)

Question asked by Martin Jay McKee on Oct 15, 2018
Latest reply on Oct 22, 2018 by Martin Jay McKee

I'm trying to debug a strange error.  I have a program that is using ADC1.  I am working in C++.  The program works perfectly with optimization off. I have a fairly complicated class that wraps the ADC for configuration and access.  Again, no problems when optimizations is set to -O0.  When enable any level of optimization, however, all of the ADC channels immediately begin reading 0.  Here's what I know.

 

I have checked all the hardware registers that I can think of through the SWD debugger and the configuration seems to be identical with or without optimization (as expected).  I have checked SEQA-CTRL and its configuration is:

SEQA-ENA[31:31]ENABLED
MODE[30:30]END_OF_SEQUENCE
LOWPRIO[29:29]LOW_PRIORITY
SINGLESTEP[28:28]0x0
BURST[27:27]0x1
START[26:26]0x0
SYNCBYPASS[19:19]ENABLE_SYNCHRONIZATI
TRIGPOL[18:18]POSITIVE_EDGE
TRIGGER[15:12]0x0
CHANNELS[11:0]0x4b

Note that the burst bit is reading as active.  The ADC1.CTRL register is configured as:

CTRL0x400800000x7
CALMODE[30:30]0x0
LPWRMODE[10:10]DISABLED
MODE10BIT[9:9]DISABLED
ASYNMODE[8:8]SYNCHRONOUS_MODE
CLKDIV[7:0]0x7

So the clock divisor is getting correctly set.  Additionally, the clock is enabled in the SYSCON->SYSAHBCLKCTRL0 and the SWM->PINENABLE0 register has the correct input pins enabled.

 

Both the SEQA-GDAT and DATx registers show no valid data (all bits are clear).  I am at a loss.

 

Any further ideas what to check?  I rewrote just the ADC code without the C++ class and I'm seeing the results I would expect to see.  However, the configuration is -- again -- the same so far as I can tell (TRIGPOL is set to NEGATIVE_EDGE) but that shouldn't matter with BURST should it?  Any ideas what I could look into to try to solve this problem?

 

Thanks,

Martin Jay McKee

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