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how to use externally generated MCLK with SAI in master mode on i.MX7D?

Question asked by Rimas Avizienis on Jul 19, 2018
Latest reply on Feb 1, 2019 by igorpadykov

I am working with the iMX7D SABRE development board and am trying to connect an audio DAC to SAI2 but am confused about how to configure the clocking/pinmux/etc to get the behavior I desire.


I am using an external oscillator to generate the master clock (MCLK) which is connected to the DAC and to an input on the iMX7.  It's not clear to me how to route this MCLK to the SAI2 block.  I want the iMX7D to act as master with respect to the DAC - so the transmit bit clock and frame sync signals are outputs from the iMX7 to the DAC.


What pin(s) on the iMX7 can I use to route this externally generated MCLK to SAI2 and how should I configure the clocking infrastructure (CCM, etc), device tree, and SAI2 control registers to achieve the desired behavior?


Can I use the SAI1_MCLK pad as an input?  Or do I have to use the CCM_EXT_CLK2 clock input, connect this to the AUDIO_PLL in bypass mode and use that as input to SAI2?  Or something else??


I have the SAI control registers set to generate transmit bit clock and frame sync (master mode), but I'm not sure how I should set the MSEL (MCLK select) bits and where to connect the externally generated MCLK.


It is not clear to me from reading the available documentation (chapter 5 and section 13.8 in the iMX7D applications processor reference manual) how to achieve this goal... 


Thanks in advance for any help!!