On the i.mx6Solo part, the MIPI_DSI section specifically calls out both generic read/writes and DBI read/writes for DCS commands.
The System Overview section of the reference manual (42.2.1) makes it look like the DBI FIFOs which would be used for a DCS read/write are not accessible via the MIPI DSI registers defined in section 42.6.
At the moment I am trying to interlace DCS commands (reads and writes) between video packets as called out in the MIPI standards. When I send the commands with video mode enabled (MIPI_DSI_VID_MODE_CFG with en_video_mode set to 1, and vid_mode_type set to 3), I can see that the DBI read FIFO (MIPI_DSI_CMD_PKT_STATUS: dbi_pld_r_empty ) now reports not empty when I do reads, but how do I get the actual data from the FIFO?
Is there a memory area somewhere that is the DBI DCS command read and write FIFOs that is accessible?
Or is there a reason that the DCS read/writes using the generic FIFO does not work when video is enabled?