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imx6ul adc2 vf610-adc issue: Timeout for adc calibration

Question asked by Arunachalam Ramaswamy on Apr 10, 2017
Latest reply on Sep 13, 2017 by 波 张

I am trying to configure ADC2 channels 6 and 7 on a custom imx6 ul board.

 

Given below is updated imx6ul.dtsi section for adc:

adc2: adc@0219c000 {
 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
 reg = <0x0219c000 0x4000>;
 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 clocks = <&clks IMX6UL_CLK_ADC2>;
 num-channels = <2>;
 clock-names = "adc";
 status = "disabled";
};

Given below are dts updates:

pinctrl_adc2: adc2grp {
 fsl,pins = <
 MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0xb0
 MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0xb0
 >;
};

 

&adc2 {
 pinctrl-names = "default";
 pinctrl-0 = <&pinctrl_adc2>;
 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 vref-supply = <&reg_vref_3v3>;
 num-channels = <2>;
 status = "okay";
};

Rearranged the channel sequence in file as given below:

static const struct iio_chan_spec vf610_adc_iio_channels[] = {
+  VF610_ADC_CHAN(6, IIO_VOLTAGE),
+  VF610_ADC_CHAN(7, IIO_VOLTAGE),
 VF610_ADC_CHAN(0, IIO_VOLTAGE),
 VF610_ADC_CHAN(1, IIO_VOLTAGE),
 VF610_ADC_CHAN(2, IIO_VOLTAGE),
 VF610_ADC_CHAN(3, IIO_VOLTAGE),
 VF610_ADC_CHAN(4, IIO_VOLTAGE),
 VF610_ADC_CHAN(5, IIO_VOLTAGE),
-  VF610_ADC_CHAN(6, IIO_VOLTAGE),
-  VF610_ADC_CHAN(7, IIO_VOLTAGE),
 VF610_ADC_CHAN(8, IIO_VOLTAGE),
 VF610_ADC_CHAN(9, IIO_VOLTAGE),
 VF610_ADC_CHAN(10, IIO_VOLTAGE),

 

I am getting following message in kernel boot log:

 vf610-adc 219c000.adc: Timeout for adc calibration

in_voltage6_raw and in_voltage7_raw are listed under /sys/bus/iio/devices/iio:device0

 

When I try to read value from ADC2 channel 6 and 7, system hangs for sometime and then kernel panic.

 

root@imx6ulboard:/sys/bus/iio/devices/iio:device0# cat in_voltage7_raw
INFO: rcu_preempt self-detected stall on CPU
0: (2100 ticks this GP) idle=68d/140000000000002/0 softirq=4518/4518 fqs=0
(t=2100 jiffies g=1106 c=1105 q=6)
rcu_preempt kthread starved for 2100 jiffies!
Task dump for CPU 0:
cat R running 0 352 245 0x00000002
[<80015d78>] (unwind_backtrace) from [<8001271c>] (show_stack+0x10/0x14)
[<8001271c>] (show_stack) from [<8007617c>] (rcu_dump_cpu_stacks+0x94/0xd4)
[<8007617c>] (rcu_dump_cpu_stacks) from [<80079c34>] (rcu_check_callbacks+0x4fc/0x8ec)
[<80079c34>] (rcu_check_callbacks) from [<8007c2e8>] (update_process_times+0x38/0x64)
[<8007c2e8>] (update_process_times) from [<8008c598>] (tick_sched_timer+0x54/0x98)
[<8008c598>] (tick_sched_timer) from [<8007cf8c>] (__run_hrtimer+0x44/0xd4)
[<8007cf8c>] (__run_hrtimer) from [<8007d384>] (hrtimer_interrupt+0x12c/0x310)
[<8007d384>] (hrtimer_interrupt) from [<8002072c>] (mxc_timer_interrupt+0x2c/0x34)
[<8002072c>] (mxc_timer_interrupt) from [<8006de54>] (handle_irq_event_percpu+0x78/0x134)
[<8006de54>] (handle_irq_event_percpu) from [<8006df4c>] (handle_irq_event+0x3c/0x5c)
[<8006df4c>] (handle_irq_event) from [<80070c08>] (handle_fasteoi_irq+0xe0/0x198)
[<80070c08>] (handle_fasteoi_irq) from [<8006d4f4>] (generic_handle_irq+0x2c/0x3c)
[<8006d4f4>] (generic_handle_irq) from [<8006d7ac>] (__handle_domain_irq+0x7c/0xec)
[<8006d7ac>] (__handle_domain_irq) from [<8000944c>] (gic_handle_irq+0x24/0x5c)
[<8000944c>] (gic_handle_irq) from [<80013200>] (__irq_svc+0x40/0x74)
Exception stack(0x88823ce8 to 0x88823d30)
3ce0: 00000000 809cd9fc 80bc9040 00000000 00000202 00000000
3d00: 00000010 88822000 00000001 80b5e080 88006000 00000001 0000002a 88823d30
3d20: 80038988 80038998 20070113 ffffffff
[<80013200>] (__irq_svc) from [<80038998>] (__do_softirq+0xa4/0x238)
[<80038998>] (__do_softirq) from [<80038df4>] (irq_exit+0xc0/0xfc)
[<80038df4>] (irq_exit) from [<8006d7b0>] (__handle_domain_irq+0x80/0xec)
[<8006d7b0>] (__handle_domain_irq) from [<8000944c>] (gic_handle_irq+0x24/0x5c)
[<8000944c>] (gic_handle_irq) from [<80013200>] (__irq_svc+0x40/0x74)
Exception stack(0x88823db8 to 0x88823e00)
3da0: 883ad2c8 0000000a
3dc0: 00000001 cccccccd 883ad000 883ad2c8 88823e60 808640c8 883ad194 88782000
3de0: 883ad2c4 00000001 00000000 88823e00 805f2f18 807e1be0 20070013 ffffffff
[<80013200>] (__irq_svc) from [<807e1be0>] (wait_for_common+0x14/0x144)
[<807e1be0>] (wait_for_common) from [<805f2f18>] (vf610_read_raw+0xf8/0x1a8)
[<805f2f18>] (vf610_read_raw) from [<805ef854>] (iio_read_channel_info+0x94/0x98)
[<805ef854>] (iio_read_channel_info) from [<8037f0b0>] (dev_attr_show+0x1c/0x48)
[<8037f0b0>] (dev_attr_show) from [<8014b3d8>] (sysfs_kf_seq_show+0x88/0xf4)
[<8014b3d8>] (sysfs_kf_seq_show) from [<8010a4cc>] (seq_read+0x1e4/0x484)
[<8010a4cc>] (seq_read) from [<800ea138>] (__vfs_read+0x1c/0xd0)
[<800ea138>] (__vfs_read) from [<800ea920>] (vfs_read+0x7c/0x108)
[<800ea920>] (vfs_read) from [<800eb1b8>] (SyS_read+0x44/0x9c)
[<800eb1b8>] (SyS_read) from [<8000f480>] (ret_fast_syscall+0x0/0x3c)

 

ADC2 pins 0 to 4, Interrupt pin GIC_SPI 101 and ADC2 Clock are configured for Touch Screen Controller node tsc in imx6ul.dtsi as given below:

tsc: tsc@02040000 {
 compatible = "fsl,imx6ul-tsc";
 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 clocks = <&clks IMX6UL_CLK_IPG>,
 <&clks IMX6UL_CLK_ADC2>;
 clock-names = "tsc", "adc";
 status = "disabled";
};

 

Is the configuration for ADC Pins 6 & 7 made for custom board are OK?

Please suggest if any change is required.

Outcomes