Regarding SD UHS mode support on T2080

[ronakadesai]

Hi,

On one of our custom board based on T2080 (silicon version 1.1) , I am expecting our SD card (Delkin 128 GB UHS-3) to get detected as ultra high speed (specifically in DDR50 mode) but linux (fsl sdk 2.0) always detects it as high speed SDXC. Even the throughput is in range of high speed only.

So, I started looking into in the driver and found that when the host controller is added, the host controller capability 2 register (eSDHC_HOSTCAPBLT2) does not show DDR50 mode supported (in fact SDR50(bit31) and SDR104(bit30)) bits are reserved . Whereas reference manual shows that host controller supports SD UHS-1 speed modes: SDR12, SDR25, SDR50, SDR104, DDR50.

sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
sdhci-esdhc ffe114000.sdhc: No vmmc regulator found
sdhci-esdhc ffe114000.sdhc: No vqmmc regulator found
sdhci: =========== REGISTER DUMP (mmc0)===========
sdhci: Sys addr: 0x00000000 | Version: 0x00002002
sdhci: Blk size: 0x00000000 | Blk cnt: 0x00000000
sdhci: Argument: 0x00000000 | Trn mode: 0x00000000
sdhci: Present: 0x0ffd0008 | Host ctl: 0x00000020
sdhci: Power: 0x00000000 | Blk gap: 0x00000000
sdhci: Wake-up: 0x00000000 | Clock: 0x00008038
sdhci: Timeout: 0x00000000 | Int stat: 0x00000000
sdhci: Int enab: 0x017f0007 | Sig enab: 0x017f0003
sdhci: AC12 err: 0x00000000 | Slot int: 0x00002002
sdhci: Caps: 0x34fa0000 | Caps_1: 0x0000af00
sdhci: Cmd: 0x00000000 | Max curr: 0x00000000
sdhci: Host ctl2: 0x00000000
sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000000000000
sdhci: ===========================================
mmc0: SDHCI controller on ffe114000.sdhc [ffe114000.sdhc] using ADMA 64-bit
mmc0: mmc_rescan_try_freq: trying to init card at 400000 Hz

Am I missing something here ?

Thanks,

Ronak

[ronakadesai · Accepted solution]

Thanks for the response Pavel,

After digging through Linux driver code I found that the host controller driver is manipulating the capability register 1 based value based on the "adapter-type" property of device-tree which gets set through u-boot. This is HW specific implementation.

After tweaking it, I am able to get DDR50 mode working on my custom HW. 

Thanks,

Ronak

[Pavel]

Check register setting of your board under u-boot.

There are the following messages on our board:

U-Boot 2016.012.0+ga9b437f (May 15 2016 - 10:37:15 +0800)

CPU0:  T2080E, Version: 1.0, (0x85380010)

Core:  e6500, Version: 2.0, (0x80400020)

=> md fe114114

fe114114: 0000af07

It means that T2080 supports DDR50 mode.

Have a great day,
Pavel Chubakov

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