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lpc2388 UART Tx fifo problem

Question asked by fz g on Mar 15, 2017
Latest reply on Mar 17, 2017 by jimmychan

When I write one byte into U0THR, the THRE & TEMT bit in U0LSR is 0. How can I know when the Tx fifo is full, or how many bytes left in the fifo when the fifo is not empty. I want to sent message by polling.