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SPI - set inactive state of SOUT

Question asked by vix on Mar 7, 2017
Latest reply on Mar 27, 2017 by Artur Petukhov

SPI on Vybrid can be configured through a dedicated set of registers.

Inactive state for PCS and SCK can be configured with PCSIS (in SPIx_MCR) and CPOL (in SPIx_CTARn).

I don't find a way to set the inactive state for SOUT, and with an oscilloscope I see that this is HIGH.

Is there a way to set it to LOW?

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