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Mass Erase through SWD without access to reset

Question asked by guylejeune on Feb 27, 2017
Latest reply on Mar 7, 2017 by guylejeune


using a MK22, I face situations where the device is secured while it still can be mass-erased.

I have to recover through SWD commands, the boards used don't provide access to reset pin (which is connected to a pull-up). 


I know it is possible to recover this situation:

  • Using the procedure from AN4835, it works from times to times (1x50) ;
  • using a PEMICRO programming device achieves it ;
  • This thread mentions it is possible, however without describing the steps to do so.


So I would like to achieve this in a deterministic ways. 

Using the procedure of AN4835, I endup most of the time with

  • CTRL [FMEIP] bit set indefinitely
  • STAT [FMEACK] is not acknowledge even though MEEN = 1


What additional steps are required ?



As pointed out by other users, the procedure described in AN4835 states

It is important to ensure that the processor doesn't receive a new reset or execute any code that could interfere with the operation of the mass erase command while the mass erase is in progress. To avoid this, keep the processor in reset by keeping RESET asserted or keeping the System Reset Request set during the mass erase.

But, according to the Ref Manual of my chip, System Reset Request bit of MDM-AP Control Register is unavailable in secure mode. 


So what extra steps are required for this procedure ?