We have uncovered a bug in the adc16/polling driver example that ships with the SDK2.1 distribution for the FRDM-KL27Z development board.
Synopsis: The adc16/polling code example sets the ADC reference voltage to VREFH / VREFL (the default), but on the FRDM-KL27Z board, the VREFH input is left floating. This leads to unpredictable readings.
Solution #1: Populate R17 on the FRDM-KL27Z board. This will tie VREFH to the 3.3V VDD voltage source.
Solution #2: Modify driver_examples/adc16/polling/adc16_polling.c as follows by adding the line in boldface. This has the effect of setting the ADC reference voltage to the VDD / VSS pair rather than the VREFH / VREFL pair: