I have a design which uses an i.MX6DL processor, my base design makes use of the Ethernet in RMII mode and uses the GPIO_16 to provide the ENET_REF_CLK. Here is the setup from my device tree:
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio5 14 0>;
status = "okay";
What I'm seeing is the Ethernet clock is running at 125MHz and I need it running at 50MHz, I was assuming there would be a max-frequency option in the device tree, but I couldn't find any such entry in the fsl-fec.txt file.
Is there a way to limit the clock rate in the device tree?
If not, how should this be handled?