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How to Resume from LPSR mode on imx7D sabre

Question asked by Aaron Moore on Sep 6, 2016
Latest reply on Sep 11, 2016 by igorpadykov



We’re working with a imx7D sabre board (EVK) and trying to test LPSR mode, but we’re not able to resume once the system enters the low power mode.


To enable LPSR, we modified the dts file per imx7d-12x12-lpddr3-arm2.dt (details below). Boot log shows message: LPSR mode enabled, DSM will go into LPSR mode!


We let the system enter LPSR mode via: “echo mem > /sys/power/state”  This results in power rails being disabled (except VSNVS and VLPSR).


However, once in LPSR mode, pressing the ON/OFF push button on the SABRE board results in the system cold booting (loading uboot and then OS) rather than resuming.


We're running the 4.1.15_ga_1.0.0 kernel and Yocto FS.


Did we miss something? Seems LPSR is supported on the arm2 board but I don't see any particular info on this configuration except the dts.


Thank you


Changes applied to add support for lpsr are based on the following dts for the arm2 board:


diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts

index 09089bb..ea2bc21 100644

--- a/arch/arm/boot/dts/imx7d-sdb.dts

+++ b/arch/arm/boot/dts/imx7d-sdb.dts

@@ -296,13 +296,15 @@

&i2c1 {

       clock-frequency = <100000>;

-       pinctrl-names = "default";

+       pinctrl-names = "default", "sleep";

       pinctrl-0 = <&pinctrl_i2c1>;

+       pinctrl-1 = <&pinctrl_i2c1>;

       status = "okay";

       pmic: pfuze3000@08 {

               compatible = "fsl,pfuze3000";

               reg = <0x08>;

+               fsl,lpsr-mode;

               regulators {

                       sw1a_reg: sw1a {


@@ -1008,6 +1009,10 @@



+&ocrams {

+       fsl,enable-lpsr;



&pcie {

       pinctrl-names = "default";

       reset-gpio = <&gpio_spi 1 GPIO_ACTIVE_LOW>;