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Wait 15 seconds for PLL to lock the input from 32KHz Crystal

Question asked by Prayook Jatesiktat on Jul 16, 2016
Latest reply on Jul 28, 2016 by Rolf Meeser


I'm working on LPC54102 and I want to change PLL's input from IRC to 32K Crystal for better timer stability.

What I did is to change 1 line of code in sysinit_5410x.c (function void Chip_SetupIrcClocking(uint32_t iFreq))

I change from

Chip_Clock_SetSystemPLLSource(SYSCON_PLLCLKSRC_IRC);

to

Chip_Clock_SetSystemPLLSource(SYSCON_PLLCLKSRC_RTC);

 

and I set in board.h
#define BOARD_MAINCLOCKRATE       (32768000)

 

When I run, it will take about 15 second (on LPCXpresso54102 board) to wait in this loop (pll_5410x.c)

while (Chip_Clock_IsSystemPLLLocked() == false) {}

 

The time can even raise up to 4 minutes on my prototype board. (sometimes it just wait forever)

 

Is there any way to speed up the PLL lock?

 

I also have found in user manual (UM10850 Rev2.1) page 68 that

"The PLL lock indicator is not dependable when Fref is below 100 kHz or above 20 MHz."

 

If I cannot depend on the PLL lock indicator, is there any good practice when the PLL input is 32.768 kHz?

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