Pins/GPIO maximum frequency LPC4337

[lpcware]

Content originally posted in LPCWare by HCTEK on Mon Jul 28 07:56:46 MST 2014
Hi!

I am trying to discover the pins maximum frequency for I/O processes. From what it is exposed on user manual chapter 16 (16.3.5), I think that the "normal" frequency is 50/80 MHz.

In order to verify the I/0 frequency of 1 MHz I used the code below (CLK_MX_TIMER1 = 204 MHz). It is a simple timer that when occur a match (MAT0) toggle the pin P5_4. Using a oscilloscope it is noted a frequency deviation of 8 KHz (see image). If I increase the frequency the deviation will also increase.

I want to use GPIO as I/O with frequencies around 20 MHz and 40 MHz.

I am using LPCOpen and I am not using an external clock. My micro is the LPC 4337. This is "normal" when using the internal clock??

void GPIO0_IRQHandler(void){
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(0));
Board_LED_Toggle(1);
LPC_TIMER1->IR = 1;
LPC_TIMER1->TCR = 3;
LPC_TIMER1->TCR = 1;
}

void TIMER1_IRQHandler(void){
LPC_TIMER1->IR = 1 << 0;
}

int main(void){
/* Generic Initialization */
SystemCoreClockUpdate();

/* Board_Init calls Chip_GPIO_Init and enables GPIO clock if needed,
   Chip_GPIO_Init is not called again */
Board_Init();

Chip_SCU_PinMux(5, 4, SCU_PINIO_FAST, 5); // P5_4 - T1_MAT0

/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_SCU_GPIOIntPinSel(0, KEY1_GPIO_PORT, KEY1_GPIO_BIT);
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(0));
Chip_PININT_SetPinModeEdge(LPC_GPIO_PIN_INT, PININTCH(0));
Chip_PININT_EnableIntLow(LPC_GPIO_PIN_INT, PININTCH(0));

/* Enable interrupt in the NVIC */
NVIC_ClearPendingIRQ(PIN_INT0_IRQn); //KEY 0
NVIC_EnableIRQ(PIN_INT0_IRQn);

/* Timer 1 with rising edge every TICKRATE_S seconds */
Chip_TIMER_Init(LPC_TIMER1);
Chip_RGU_TriggerReset(RGU_TIMER1_RST);
while (Chip_RGU_InReset(RGU_TIMER1_RST)) {}
LPC_TIMER1->CTCR = 0;
LPC_TIMER1->PR = 0;
LPC_TIMER1->MR[0] = Chip_Clock_GetRate(CLK_MX_TIMER1) / (2*1000000);
LPC_TIMER1->MCR = 3;
LPC_TIMER1->EMR = 0x3 << 4; //toggle

/* Spin in a loop here.  All the work is done in ISR. */
while (1) {
__WFI();
} 

return 0;
}

Best Regards,
Hugo

[lpcware]

Content originally posted in LPCWare by bavarian on Mon Aug 04 09:35:40 MST 2014
Hello Hugo,

how about "Google it"     ;-)

It is Cortex-M4 specific and is well documented, for example here:

http://community.arm.com/docs/DOC-2607

Regards,
NXP Support Team

[lpcware]

Content originally posted in LPCWare by HCTEK on Mon Aug 04 07:40:56 MST 2014
Hello bavarian,

thanks for the reply.

I did not find any references about the time that an ISR need to be answered. However, I imagined that it could be the main factor.

The 12 cycles is for any type of ISR? Where I can find that information?


Best Regards,
Hugo

[lpcware]

Content originally posted in LPCWare by starblue on Mon Aug 04 07:30:51 MST 2014

---

Quote: bavarian

If you want to achieve frequencies of 20 to 40MHz you need to work without interrupts (just use the timer as PWM generator, use handwritten linear code to toggle the GPIO in some way or use the SCT block to do things (hardware controlled state machine).

---

Don't forget SGPIO.

Jürgen

[lpcware]

Content originally posted in LPCWare by bavarian on Mon Aug 04 04:53:56 MST 2014
Hello Hugo,

please consider one thing: processing an interrupt takes time. Whatever the GPIO pad is physically able to do, the determining factor is the time you spend on going into the ISR and run the ISR. It takes you 12 cycles to get into the ISR, so even if you run at 204MHz and do nearly nothing in the ISR you could achieve maybe a 10MHz turnaround period.

If you want to achieve frequencies of 20 to 40MHz you need to work without interrupts (just use the timer as PWM generator, use handwritten linear code to toggle the GPIO in some way or use the SCT block to do things (hardware controlled state machine).

The IO pads on the LPC4330 are normally good for 120MHz, as many of them are used for the external memory interface which can run on this frequency. But the typical values provided in the user manual should be the basis for your design.

The internal oscillator should be accurate within its specification of +/- 1%, so there could be a deviation.
This can be further trimmed, if this is not sufficient an external crystal must be used.

Regards,
NXP Support Team