Causing an S12 Reset

[Bee]

I'd like to make a Reset happen on the S12 at will using some instruction or sequence of instructions. Is that possible? Does anyone know how to do it? Thanks.

[kef]

On S12, the best way to reset chip from software is to enable COP (if not already enabled) and write value other than 0x55 and 0xAA to ARMCOP register. Don't forget that COP config registers are write-once register so you should either keep COP always enabled and pet it periodically, or don't touch COP config until you want to reset. COP disable/enable won't work in normal modes.

On S12X in normal single chip mode you also can use illegal address access reset. Just read unimplemented memory area.

[Bee]

Your S12X solution is what I was looking for: reading an unimplemented memory location. That's the simplest and most elegant without using COP.
Thank you.

[dkelly]

Have a very similar situation where I have inherited fielded S12NE64's with COP disabled. The "write once after reset" has been consumed. Can remotely update the firmware but have found no internal software means to RESET the CPU that new firmware can enable COP. Nobody thought to wire the RESET pin to an I/O port.

Eventually a power failure will reset the unit, I'd rather not wait. Is there any other way?

[kef]

Bee, S12NE is S12, not S12X, and doesn't have illagal address access feature.

dkelly,

if you want COP to stay off, then why aren't you just leaving COPCTL untouched after reset? At the other hand why not enable and use COP?

Yes, there's yet another way. If you enable STOP, clock monitor (CME), and enter STOP mode with oscilator off, then CME will detect a loss of clock and reset your chip.

Message Edited by kef on 2008-05-15 03:27 PM

[dkelly]

OK, finally getting around to testing this and am stumped at how to deliberately trip the CME to cause a reset.

An S12NE64 with the following values:

PLLCTL = 0xc0
CLKSEL = 0x80
CRGFLG = 0x9c
CRGINT = 0x80

Interrupts are disabled with SEI.

Doesn't seem to stop for an assembly STOP instruction, in fact it seems to run right through STOP.

Read 4.3.2.7 where it says, "In Stop Mode (PSTP=0) the clock monitor is disabled independently of the CME bit setting and any loss of clock will not be detected." so I added PSTP to CLKSEL and no improvement.

CLKSEL = CLKSEL_PLLSEL_MASK + CLKSEL_PSTP_MASK;

Had the great idea that if I would CLKSEL_PLLSEL = 1 select the PLL as the clock then disable the PLL using PLLCTL_PLLON = 0, that it should reset for lack of a clock. Doesn't seem to be happening.

Appears the clock logic was designed to be foolproof, preventing exactly what I'm trying to do. So in summary, "How can I invoke a Clock Monitor Reset?"

The whole idea here is to make a RESET so that a previously disabled COP can be enabled. Otherwise I could just jump to _Startup().

[dkelly]

kef, thanks for the useful reply. Was exploring clock resets last week and an extra set of eyes confirming that route is very helpful.

As I said originally, have inherited maintenance of several thousand fielded units. Possibly wasn't clear enough in stating the write-once-after-reset for COPCTL was used early in the startup process in the fielded code. Can update all the firmware in the unit remotely but am looking for a real RESET rather than a jump through the RESET vector. A real RESET that should let me enable COP.

I agree completely, if one doesn't want COP then one should not touch COPCTL. But there are some who have a philosophy of explicitly writing all registers out of reset not trusting manufacturer's defaults. And sometimes that philosophy can put the MCU into usable state without a physical RESET.

While writing a bad value to ARMCOP is an excellent way to RESET, the clock monitor reset is my compatible solution for exiting the old firmware, and should also work on the new. And in the scheme of things implementing both one right after the other doesn't cost anything.

[Bee]

That sounds like another great idea. I'll use that myself in June. Thanks.

[Bee]

Look at the memory space that you have for your particular MCU. Find a memory location(s) that is not available (a page that does not exist). Try reading from that location. It should cause an illegal access which should go to a Reset condition. You'll have to experiment with it to be sure it resets. Once you have found that 'magic location', you can build code to Reset at will. I was able to do it a few times, so I'm confident it works, but I have not built up a routine which I can easily call (another 'fire' turned up to consume my time).
Good luck. And I expect to be on it in June sometime. We can coordinate again at that time.