AnsweredAssumed Answered

mx6d, how to use rmii with lan8720 in uboot ?

Question asked by li chao on May 11, 2016
Latest reply on Jul 26, 2017 by wen cheng

platform: mx6d , uboot-2015-04-r0

          rmii + lan8720a (The sch is OK, because rmii (lan8720a) in linux3.14.52 is ok)

 

List what I have done .

 

mx6sabresd.c

1,PINs config 

static iomux_v3_cfg_t const enet_pads[] = {
            MX6_PAD_ENET_MDIO__ENET_MDIO                   | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_ENET_MDC__ENET_MDC                      | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_ENET_CRS_DV__ENET_RX_EN       | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_ENET_RX_ER__ENET_RX_ER                     | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_ENET_TX_EN__ENET_TX_EN                     | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_ENET_RXD0__ENET_RX_DATA0                | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_ENET_RXD1__ENET_RX_DATA1                | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_ENET_TXD0__ENET_TX_DATA0     | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_ENET_TXD1__ENET_TX_DATA1     | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
            MX6_PAD_EIM_D21__GPIO3_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL),
};

 

2,PIN IOMUX  and  PHY reset

static void setup_iomux_enet(void)
{
            imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
            // Reset lan8720 PHY
            gpio_direction_output(IMX_GPIO_NR(3, 21) , 1);
            udelay(150);
            gpio_set_value(IMX_GPIO_NR(3, 21), 0);  
            udelay(200);
            gpio_set_value(IMX_GPIO_NR(3, 21), 1);
            udelay(100);
}

 

 

3,clk 50MHz , and  run it in board_init()

static int setup_fec(void)

{
    struct iomuxc_base_regs *iomuxc_regs =
                (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
    int ret;
    /* set gpr1[21] to select anatop clock */
    clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK, 1
<< 21);
            ret = enable_fec_anatop_clock(0, ENET_50MHZ);
            if (ret)
                        return ret;
    return 0;
}

 

mx6sabre-common.h

4,RMII  CONFIGs

 

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE            ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE        RMII
#define CONFIG_ETHPRIME                 "FEC"
#define CONFIG_FEC_MXC_PHYADDR        0

#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC

 

 

5,now ,what we got

 

a , clk 50MHz is OK ,we can test it .

 

b, log as below:  (ip is the same 192.168.0.x )

 

U-Boot 2015.04-imx_v2015.04_3.14.52_1.1.0_ga+g6cf684a (May 10 2016 - 16:42:24)

CPU:   Freescale i.MX6D rev1.2 at 792 MHz
CPU:   Temperature 36 C
Reset cause: POR
Board: MX6-SabreSD
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
No panel detected: default to Hannstar-XGA
Display: Hannstar-XGA (1024x768)
In:    serial
Out:   serial
Err:   serial
switch to partitions #0, OK
mmc2(part 0) is current device
Net:   FEC [PRIME]
Normal Boot
Hit any key to stop autoboot:  0
=>
=>
=> ping 192.168.0.1
Using FEC device
error frame: 0x4ef46dc0 0x00000804
error frame: 0x4ef47400 0x00000804
error frame: 0x4ef47a40 0x00000804
error frame: 0x4f24ba40 0x00000884
error frame: 0x4f24c080 0x00000804

ARP Retry count exceeded; starting again
error frame: 0x4ef46dc0 0x00000804
error frame: 0x4ef47400 0x00000804
error frame: 0x4ef47a40 0x00000804
error frame: 0x4f24ba40 0x00000804
error frame: 0x4f24c080 0x00000884

ARP Retry count exceeded; starting again

 

 

 

we found the same problem :

 

http://bbs.21ic.com/icview-727812-1-1.html

 

It really have a patch about rmii of uboot ?

 

WHO CAN help me ?@Biyong Sun

Outcomes