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Enabling ROM divide causes hard fault on LPC11U1x

Question asked by LPCware Support on Mar 31, 2016

As described in the FAQ "ROM Divide", the LPCXpresso IDE provides support for making use of the ROM Divide routines contained in certain Cortex-M0 / M0+ MCUs, including the LPC11Uxx family of parts.

 

However it is possible if you are using an early LPC11U1x silicon, then if you enable the ROM divide support in LPCXpresso IDE, when you run your code on your target hardware, you may encounter a hard fault during the execution of the startup code. This is because the ROM divide routines were not implemented in early silicon - in particular this affects the silicon fitted to some LPCXpresso11U14 boards.

 

If required, the attached test project can be imported into LPCXpresso IDE, built and run on your board to identify whether or not the ROM divides are implemented on your silicon. Below is the result of running this test project on two boards - an LPCXpresso11U14 which has silicon on it without ROM divide support, and an NGX BlueBoard-LPC11U14 which has silicon fitted which does have ROM divide support.

 

BoardChip MarkingsTest Output
LPCXpresso11U14LPC11U14F
/201
S62477
ZSD11
200AX
PTR_ROM_DRIVER_TABLE : 1fff1ff8
Content of PTR_ROM_DRIVER_TABLE : 1fff1e38
div_ptr : ffffffff
ROM divide NOT supported
NGX BlueBoard-LPC11U14LPC11U14F
/201
S62653
ZSD11
435BY
PTR_ROM_DRIVER_TABLE : 1fff1ff8
Content of PTR_ROM_DRIVER_TABLE : 1fff1f54
div_ptr : 1fff1f44
ROM divide supported

Original Attachment has been moved to: LPC11U14_romdividecheck.zip

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