Disable Dcache of 5744 will make CCP unsteadiness

[liujinhang]

When I use the EEPROM emulation code, I need disable the dcache of 5744, or the swapping will fail.

The function of disabling dcache see below:

void dcache_disable(void)

{ /* Body */

   register UINT32 val;

   E200CORE_SPR_GET(val,E200CORE_L1CSR0); /* L1CSR0 */

   val &= ~E200CORE_L1CSR0_CE;

   /* Memory Synchronize */

   E200CORE_SYNC();

   /* Instruction Synchronize */

   E200CORE_ISYNC();

   E200CORE_SPR_SET(E200CORE_L1CSR0,val);

   /* Instruction Synchronize */

   E200CORE_ISYNC();

} /* Endbody */

In this case,the EEPROM emulation works very well, but the CCP with VECTOR'S APE became be unsteadiness.

I want to know how to solve the contradiction between EEPROM emulation and CCP?

[liujinhang]

Thank you very much!

I think I have resolved this problem by your second point of view.

I inited the SMPU and found the EEPROM emulation need not disable D-chache while swapping works very well.

Only thing should be noted is the SMPU must cover all the memory addresses could be accessed by your software project.

Thanks very much again!

[lukaszadrapa]

Hi,

as mentioned in EEE user manual, "It is highly recommended that the D-cache of core should be disable at the initialization code

to make sure the program/erase functions work properly".

I can see two options to make it bulletproof:

1. Keep the data cache disabled all the time.

2. If you want to keep the data cache enabled to improve the performance, configure the EEE area as cache inhibited in memory protection unit.

Regards,

Lukas

[liujinhang]

I am afraid that I did not get the root course of my problem. Because the CCP unsteadiness occurs again after I set the EEPROM enulation area "cache inhibit".

And I found that the function "FSL_InitEeprom" coursed this problem. But I don't know the reason.

[lukaszadrapa]

Have you invalidated the data cache after SMPU initialization? If the data cache was initialized before initialization of SMPU, there could be some data already cached.

Regards,

Lukas

[liujinhang]

I think I found the root course of my problem.

I masked the funciton of "DisableFlashControllerCache" in my project, and glad to see that my CCP function works very steadily.

But I do not know why the cache of flash controller will effect the CCP?  we know the CCP is only operation the ram and read code of flash.

[lukaszadrapa]

There's one more note in the user manual for EEE that explains the behavior:

[liujinhang]

I am sure that I only operate the falsh controller cache once at the beginning of my application.

[lukaszadrapa]

Now I'm not sure if I can understand. Is the flash buffer (mini-cache) enabled or not?

[liujinhang]

Do you know why I operate the function "DisableFlashControllerCache" will make the CCP unsteadily?

[lukaszadrapa]

It doesn't make sense to me. The disabling of mini-cache should solve all troubles but it looks like it works in opposite way in your project. Could you double check in your debugger that P0BFEN and P1BFEN are cleared all the time? Is there anything what could change this setting?

[liujinhang]

Hi,

can you give me  some suggestion to get the root course?

[lukaszadrapa]

Hi,

I'm out of ideas. It would require some debugging to find the root cause. Do you have any simple project to share, so I can duplicate the problem?

Lukas

[liujinhang]

hi,

do you have VECTOR'S APE tools?    if you do not have it , i think you could not detect the unsteadily CCP function.

if you have it , tell me and i will make a smallest project for you.

[lukaszadrapa]

No, I don't have the tools.

Is everything working as expected when CCP is not used?

[liujinhang]

YES！

[lukaszadrapa]

The last thing that comes into my mind - it could be performance issue. If the mini cache is disabled, the execution time of code could be significantly affected and cause troubles in CCP.

[liujinhang]

I don't think so. if the reason as you said, other functions should also worked unsteadily. but i didn't found that.

what is the flash controller cache really funciton?    what is the difference for MCU between disable it and enable it ?

[lukaszadrapa]

The flash requires certain number of wait states for read. Due to nature of flash, it is not able to return data in single cycle. If the flash page buffer (minicache) is disabled, the physical flash must be read every time when instruction is going to be fetched or when data are read. So, the master has to wait until the instruction/data are available.

If the flash page buffer / minicache is enabled, it holds whole flash page in buffer. In case of MPC5744P, the minicache is 4-entry, 2-way and each entry contains one flash page which is 256bit. When physical flash is read, it always read whole page. Once the instruction/data are available in buffer, it can be read in single cycle, so it will save significant amount of time.

Regards,

Lukas

[liujinhang]

If the flash page buffer / minicache is disabled, is there any possible get wrong data from flash when instruction is going to be fetched?

发件人: lukaszadrapa

发送时间: 2016年1月26日 16:17

收件人: liu jinhang

主题: Re: - Disable Dcache of 5744 will make CCP unsteadiness

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Disable Dcache of 5744 will make CCP unsteadiness

reply from Lukas Zadrapa <http://jiveon.jivesoftware.com/mpss/c/9wA/PDcDAA/t.1u5/N7giuHWrRs2WUt0HVN5O5w/h1/eqhG5v9o4WV1pCmWaB03cUjBPgRj-2F3GoJUaXSZ409bQlPCh-2BdR0Iuh2b8GsySf-2BTzStW8Kcy62N7SZlPsQqm9PXJpFJHNa7nyleWxUK8Pkk-3D> in MPC5xxx - View the full discussion <http://jiveon.jivesoftware.com/mpss/c/9wA/PDcDAA/t.1u5/N7giuHWrRs2WUt0HVN5O5w/h2/eqhG5v9o4WV1pCmWaB03cUjBPgRj-2F3GoJUaXSZ409bTmLVypvQ3N0JEOjJfRDTVhFHxELVqW5sicN0ephqvzyJoShGGs8g6nlowSfaHch84-3D>

[lukaszadrapa]

No, that's not possible. The flash can become corrupted (unexpected reset during flash modify operation, flash wear-out, over-programming...) but it has nothing to do with mini-cache. Moreover, flash is protected by ECC, so single bit errors are automatically corrected and multi-bit errors are reported...

Lukas