i.MX6 GMAC to GMAC connection

[alexwang]

Hi experts,

I have a problem of GMAC to GMAC connection between i.MX6 and RTL8364 gigabit switch.

The nets connection are correct and ENET_REF_CLK is connected to 125MHz Oscillator.

In our Android software setting only has AR8031 PHY driver, we don't know how to make i.MX6 work with RTL8364 switch.

We got RTL8634 driver but we don't know how to replace original AR8031 driver in u-boot and Android kernel.

MDIO is workable and can read out registers from RTL8364.

RTL8364 has TX_CLK 125MHz output but i.MX6 doesn't output GTX_CLK.

Could you help us?

Thank you.

RGMII connection as below.

i.MX6               Switch

--------               ----------

TXD[3:0]---------RXD[3:0]

TX_CTL----------RX_CTL

GTX_CLK-------RX_CLK

RXD[3:0]---------TXD[3:0]

RX_CTL----------TX_CTL

RX_CLK----------GTX_CLK

B/R

Rich

[Yuri]

Hello,

  In addition to clock configuration, please double check other signals connection

between the i.MX6 and the switch. The cross-connection (TX <-> RX) usually used

for PHY-less configuration ; for Ethernet switches direct one is applied  (TX <-> TX, ...etc).

  I cannot find the RTL8364 Datasheet with recommendations.

Have a great day,
Yuri

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[alexwang]

Dear Yuri,

Thank you for your response.

The connection was correct and reviewed by FSL last month.

I know i.MX6 internal MAC only connects external PHY chip in reference design, ex. AR8031.

But our application is a 4 ports switch built-in.

My problem is how to config u-boot to make i.MX6 work with the switch.

Thank  you.

B/R

Rich

[BiyongSUN]

As Yuri said, I could not find RTL8364,either.

Please provide datasheet here.

The RGMII shared the reference clock. It is iEEE spec.

[alexwang]

Dear Sun,

Since NDA issue, I can't share RTL8364 data sheet with you.

But I found RTL8363 pdf on internet, it's a similar parts.

You can reference it.

Thank you.

B/R

Rich

[alexwang]

http://www.datasheet-pdf.com/PDF/RTL8363SB-Datasheet-Realtek-846249

[hiteshviradiya]

Dear Alex,

Are you able to make it worked?

We are designing product based on IMX6 and we have used Marvell 88E6178 switch (7 port).

We have similar connectivity as you have, can you share your experience (problem faced) & some guidance on u-boot related code changes.

--

Thanks,

Hitesh

[alexwang]

Hi Hitesh,

It's workable.

Since i.MX6 SDK is included AR8035 GPHY driver, you must replace it by new switch driver.

Then, it is works.

B/R

Rich

[hiteshviradiya]

Hi Alex,

Thanks for the response. We took reference of some other Marvell switch & Atheros PHY reference and implemented it.

We hope it will work fine during board bring up when we will receive PCBs.

--

Thanks,

Hitesh

[alexwang]

Hi Experts,

After modifying u-boot, TX clock and data came out from i.MX6.

But i.MX6 still ping fail.

I think that maybe something else we missed in u-boot setting.

B/R

Rich

[BiyongSUN]

i.MX6 no GMII support. Supports MII, RMII and RGMII.

Please refer to the datasheet and reference manual.

RGMII shares the reference clock from one of the list i.MX6, phy or external oscillator.

And you question is very confused to me.

you said GMII. and the connection shown is RGMII.

GMII has 8 bit for data. RGMII has 4 bit for data.

GMII seperate the TX and RX reference clock.  RGMII share the reference clock.

Could you please make sure which type of phy in your question. and you really understand the signals of a phy.

here is your connection

RGMII connection as below.

i.MX6               Switch

--------               ----------

TXD[3:0]---------RXD[3:0]

TX_CTL----------RX_CTL

GTX_CLK-------RX_CLK

RXD[3:0]---------TXD[3:0]

RX_CTL----------TX_CTL

RX_CLK----------GTX_CLK

[alexwang]

Dear Sun,

Sorry to confuse you. What I said GMAC is Gigabit MAC not GMII.

The interface is RGMII. That's correct.

The software configuration of RTL8364 4 ports switch by using i.MX6 MDIO/MDC interface is no problem.

Both RTL8364 and i.MX6 have 125MHz TX clock output each.

Using U-boot pin and result is fail.

Please reference below figure.

Thank you.

B/R

Rich

[BiyongSUN]

RGMII(Reduced GMII) only has ONE reference clock for both RX and TX.

Either PHY provide reference clock,  host cpu provide reference clock or a crystal oscillator.

Your diagram is totally wrong for RGMII.

Please make sure you are using RGMII NOT GMII.

And refer to the reference design.