Hi everyone,
I am trying to interface an ADC to K60 MCU (TWR-K60F512) using I2S interface.
ADC is always a MASTER
Reading ADC:
Please see the below timing diagram of ADC, which shows how it transmits the conversion results.
Following are the ADC signals related to ADC Read :
a) Serial Clock Output (SCO),
b) Frame Synchronization Output (FSO)
c) Serial Data Output (SDO)
- The data read from ADC is clocked out using Serial Clock Output(SCO).
- The conversion result output on the SDO line is framed by the frame synchronization output FSO, which is sent logic low for 32 SCO cycles.
- Each bit of the new conversion result is clocked onto SDO line on the rising SCO edge and is valid on the falling SCO edge.
- The 32-bit result consists of 24 data bits followed by 8 status bits.
Writing ADC:
Please see the below timing diagram of ADC which shows how a write operation is performed.
Following are the ADC signals related to ADC write:
a) Serial Clock Output (SCO) same as above
b) Frame Synchronization Input (FSI)
c) Serial Data Input (SDI)
- Serial writing operation is synchronous to SCO signal.
- The status of the FSI is checked on the falling edge of the SCO signal. If FSI line is low, then first data bit on the SDI line is latched on the next SCO falling edge.
- FSI signal is made low at a position when SCO signal is high or low to allow setup and hold times from the SCO falling edge to be met.
- The width of the FSI signal can be set to between 1 and 32 SCO periods wide.
- Write data is pumped onto SDI with sync to SCO.
- A second or subsequent falling edge that occurs before 32 SCO periods have elapsed is ignored.
For this requirement, I planned to interface ADC to I2S module as follows:
SCO -> I2S0_RX_BCLK, I2S_TX_BCLK
FSO -> I2S0_RX_FS
SDO -> I2S0_RX_D0
FSI <- I2S0_TX_FS
SDI <- I2S0_TX_D0
Please review the configuration and suggest the required configuration settings like Mode (Synchronous, Asynchronous, Synchronous with Other SAI..) and other configuration register settings.
Thanks in advance
Gourah
