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MPC5748G, Lauterbach multiple-reset causes error

Question asked by Umar Ali on May 14, 2015
Latest reply on Apr 12, 2018 by Reinhard Weiss

HI everyone,

 

I am using PPC5748G processor for a certain application and using Trace32 Lauterbach for debugging and flashing. My problem is that when my application (basically it is a RTOS test) resets the core multiple times, the processor goes in a state where it has to be power-cycled, and simply resting the target doesn't work.

 

meanwhile the debugger lists this error message :

"    system.up error: received invalid OSR (0x000)

                                - does the target assert JCOMP while RESET is asserted?

                                - is the device censored?

     error: received invalid OSR while core running (0x000) "

 

so is it a hardware limitation or is there any script that can help me solve this problem ?

 

 

Looking forward reply,
uali

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