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i.MX6Q ENET.REF_CLK input

Question asked by Clemens Gruber on Feb 3, 2015
Latest reply on Mar 5, 2015 by Clemens Gruber

Hi,

 

we use the i.MX6Q with a KSZ9031RNX PHY from Micrel.

Besides the RGMII signals, there is the ENET.REF_CLK input to the i.MX6 Ethernet MAC: Originally we tried to connect the CLK125_NDO output from the PHY to the ENET.REF_CLK, but there is an erratum for the KSZ9031 that this CLK125_NDO signal has duty cycle variations. One workaround would be, to use a separate 125 MHz oscillator and not use the PHY's CLK125_NDO pin at all?

 

We read in the reference manual of the i.MX6Q that there is an internal 125 MHz clock, so is it even necessary to connect an external oscillator to ENET.REF_CLK or would the i.MX6Q Ethernet MAC just use the internal 125 MHz clock instead automatically? Or can this be configured via pinmuxing / input select?

 

PS: The errata sheet lists a second workaround: Enforcing 1000Base-T Master mode, but that is not a viable option for us as devices must be interconnectable directly.

 

Any ideas?

 

Thank you.

 

Best regards,

Clemens Gruber

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