i.MX6 Solo LVDS noise

[thanhnhatle]

Hi all,

We are using i.MX6 Solo with LVDS LCD (1366x768) on LVDS0 channel.

OS is customized from L3.0.35_4.1.0_130816_source.gz

LCD displays correctly but sometimes have some noise as below.

I forcus on the clock tree of IPU and LDB.  The origin source of ipu1_clk and ldb_di0_clk is different as below, made them asynchronous with each other to output from IPU to LDB, I thought.

osc_clk (24MHz) → pll3_usb_otg_main_clk (480MHz) → pll3_pfd_540M (540MHz) → ipu1_clk (270MHz)

osc_clk (24MHz) → pll2_528_bus_main_clk (528MHz) → pll2_pfd_352M (559.058MHz) → ldb_di0_clk (79.865MHz) → ipu1_di_clk_0 (79.865MHz)

Origin source of ipu1_clk is PLL3  (pll3_usb_otg_main_clk).

Origin source of ldb_di0_clk is PLL2 (pll2_528_bus_main_clk).

I have referenced the iMX6 Quad.  ipu1_clk and ldb_di0_clk has the same origin source PLL2.

Is there any patch for this problem on this OS version ?

Can you recommend how to fix this noise?

Sincerely

Le

Original Attachment has been moved to: Solo_Clock_tree.txt.zip

[thanhnhatle]

I want to give more information how to reproduce this noise.

You  can reproduce this noise in two ways:

1. Just repeat power OFF and ON the i.MX6 Solo until this noise occur

2. Repeat the blank command to Stop then ReStart the IPU until this noise occur.

echo 1 > /sys/class/graphics/fb0/blank

echo 0 > /sys/class/graphics/fb0/blank

When this noise occur, It can not recover back to the screen without noise until you reboot the CPU or restart the IPU.

Below is the clock tree of i.MX6 Quad I referenced. IPU and LDB have the same clock source PLL2 (pll2_528_bus_main_clk).

osc_clk (24MHz) → pll2_528_bus_main_clk (528MHz) → periph_clk (528MHz) → mmdc_ch0_axi_clk (528MHz) → ipu1_clk (264MHz)

osc_clk (24MHz) → pll2_528_bus_main_clk (528MHz) → pll2_pfd_352M (271.542MHz) → ldb_di0_clk (38.791MHz) → ipu2_di_clk_0 (38.791MHz)

Best Regards

Le

[igorpadykov]

Hi Thanh

I think that you can not try "repeat power OFF and ON"

- this just can point that something wrong with  board power supplies.

In general, before power ON all power supplies should be fully discharged.

~igor

[thanhnhatle]

Hi Igor

I found below thread has the same issue with us.

I applied the same code to my version OS and it worked well without noise.

LVDS panel display corruption

Regards

Le

[igorpadykov]

Hi Thanh

from description this seems more as hardware, not software issue.

I would suggest to decrease lvds clock, change lvds cable, recheck

board layout with sect.3.10 LVDS recommendations IMX6DQ6SDLHDG.

DDR memory errors also may be the reason of such behaviour.

If you think that this is software issue, please try to reproduce it on Freescale

reference board.

Best regards

igor

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