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i.MX6 Solo LVDS noise

Question asked by Thanh Nhat Le on Jan 12, 2015

Hi all,

 

We are using i.MX6 Solo with LVDS LCD (1366x768) on LVDS0 channel.

OS is customized from L3.0.35_4.1.0_130816_source.gz

 

LCD displays correctly but sometimes have some noise as below.

noise.png

 

I forcus on the clock tree of IPU and LDB.  The origin source of ipu1_clk and ldb_di0_clk is different as below, made them asynchronous with each other to output from IPU to LDB, I thought.

 

osc_clk (24MHz) → pll3_usb_otg_main_clk (480MHz) → pll3_pfd_540M (540MHz) → ipu1_clk (270MHz)

osc_clk (24MHz) → pll2_528_bus_main_clk (528MHz) → pll2_pfd_352M (559.058MHz) → ldb_di0_clk (79.865MHz) → ipu1_di_clk_0 (79.865MHz)

 

Origin source of ipu1_clk is PLL3  (pll3_usb_otg_main_clk).

Origin source of ldb_di0_clk is PLL2 (pll2_528_bus_main_clk).

 

I have referenced the iMX6 Quad.  ipu1_clk and ldb_di0_clk has the same origin source PLL2.

 

Is there any patch for this problem on this OS version ?

Can you recommend how to fix this noise?

 

Sincerely

Le

Original Attachment has been moved to: Solo_Clock_tree.txt.zip

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