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Does FTM output when timer is stopped go high impedance?

Question asked by Jan Rychter on Dec 22, 2014
Latest reply on Jan 4, 2016 by xiangjun.rong

What is the state of FTM output when using EPWM (FTM1_C0SC = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK)) and the timer is stopped using FTM1_SC &= ~FTM_SC_CLKS_MASK ?


It seems that the output goes high impedance, which I found unexpected and could not find described in the documentation. I expected the output to remain at the same level that it was just before the timer was stopped.