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EIM performance issue on iMX6

Question asked by Rob_iMX6 on Aug 18, 2014
Latest reply on Jul 8, 2015 by Baldev patel

We have connected the EIM of an iMX6DL to a FPGA. BCLK at 99MHz, 16 bit muxed mode, synchronous.


Data transfer works, 16 bits, bursts up to 16 length too. So we can read 32 bytes in less than 240ns. And write in only 170ns. So far so good.

Clock setup is standard as done in the SDK, but CPU at 996MHz. DDR=396MHz.


However, what struggles me: After each burst, there will be silence on the bus, even though there are requests waiting:


Situation 1:

     Level 1&2 cache enabled for D&I.

     EIM interface NOT cached.

     SDK software, only one processor enabled, all GPUs etc. clock gated OFF (also tried with on)

     running NEON command vld1.64 {d0,d1,d2,d3}, [r0] in an endless loop. r0=EIM address (0x08000000, so no boundary issue here).


     RESULT: bursts being generated, but approx 350ns pauses (CS high)... Performance: approx. 50MB/s or 40% of theoretical 128MB/s

     QUESTION: What prevents the AXI bus or whoever from accessing quicker? there is absolutely no other traffic around!


Situation 2:

     same as above, but cache enabled on EIM-address space.

     for write: using cache flush on L1&L2 (only way to generate write burst in full length)

     for read: using cache invalidate

     RESULT: identical, performance max. 50MB/s instead of 128MB/s.


Situation 3:

     all data caches DISABLED

     running SDK SDMA test mem_2_mem

     RESULT 1: with setup DDR_2_DDR : 40764kB/s (we only have 16bit DDR3 RAM)

     RESULT 2: with setup OCRAM: 28573 kB/s (terribly bad!!)

     RESULT 3: Read EIM to write OCRAM: 24116kB/s, WHICH IS TERRIBLY BAD. Remember: Our EIM is clocked at 99MHz, 16bit. I would expect something close to 128MB/s, but we're at 19% of this speed...

     Result 4: read OCRAM and write to EIM: slightly better due to shorter burst access to our FPGA, but still poorest performance.

     On the scope I see idle phases (CS high) of 1050ns.


I guess that the NIC-301 unit delays the accesses. Unfortunately, there is not enough information, on how to change the settings. Does somebody know more?