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PCIe BAR Configuration Failed When Interfaced with Freescale i.MX6Q

Question asked by Sushant Mahajan on Jul 31, 2014
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We are trying to validate PCIe Communication with Lattice ECP5 to Freescale.iMX6 Device.


During enumeration we have seen that the EP is getting detected but the BAR Configuration remains half-finished hence BARs inside EP remain in their initial state and hence driver doesn’t get loaded completely into the Kernel Module.


For successful BAR Configuration ARM RC should program upper bits of BART with the starting address range assigned for the interfaced PCIe EP Card.




Could you please assist us in this if you have solution for the above problem or atleast the workaround which will solve the above problem?




Let us know if you need more details on this.




Message was edited by: Sushant Mahajan

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