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IMX6D ODT

Question asked by Tom Saluzzo on Jul 6, 2014
Latest reply on Jul 9, 2014 by Yuri Muhin

Customer is using their controller card, in which they created by copying the schematic and code from MCIMX6Q-SDB. They did not copy the PCB design/layout. In review of the memory ODT, they have the following questions:

 


Is there a preferred value for the ODT resistance Rtt_non (ie 60 Ohms or 120 Ohms)?

 

U-Boot sets the nominal ODT resistance value for a write access to 60 Ohms. However, U-Boot sets the Dynamic ODT resistance value to 120 Ohms for burst write accesses. Why is there a different ODT resistance value for a burst write access?

 

U-Boot sets the system up such that the ODT resistors are enabled in the DDR3 SDRAM’s whenever the IMX6 is writing data to the DDR3 SDRAM’s. U-Boot uses the ODT control pin to disable the ODT resistors in the DDR3 SDRAM’s when reading data out of the SDRAM’s. This makes sense to me; the termination resistors are on the receiving side of the transaction. My question is: Are the ODT termination resistors enabled in the IMX6 when the IMX6 is reading data out of the DDR3 SDRAM’s? If so, how is this accomplished?

 

There is a Pad Group Control Register at address 0x020E_0774 that sets the input mode of the DDR3 SDRAM data bus signals. U-Boot writes 0x0002_0000 to this register. This configures the DDR3 SDRAM data bus signals for the “differential input mode”. Since the DDR3 SDRAM data bus signals are single ended, I changed the contents of this register to 0x0000_0000. This configures the DDR3 SDRAM data bus signals for the “CMOS input mode”. The board wouldn’t boot after I made this change. Why?

 

I attempted to write 0x0000_0200 to the Pad Group Control Registers located at the following addresses:

0x020E_754, 0x020E_75C, 0x020E_760, 0x020E_764, 0x020E_76C, 0x020E_778, 0x020E_77C, 0x020E_780.

Writing 0x0000_0200 to these registers sets the ODT resistance value for the DDR3 SDRAM Data Bus (DDR3_SDRAM_D63 – DDR3_SDRAM_D0) to 60 Ohms. Writing 0x0000_0200 to these registers breaks the board (i.e. the board won’t boot). The default (i.e. reset) value for these registers is 0x0000_0000 (ODT resistance disabled). However, when I tried writing 0x0000_0000 to these registers, I broke the board again. Why is this happening?

 

Tom Saluzzo

FAE

Arrow Electronics

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