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Uboot problem on uncustom P2020RDB-PC board

Question asked by Hu Yang on Jun 20, 2014
Latest reply on Jul 2, 2014 by Min Zhao

Hi all,

 

We have an uncustom P2020RDB-PC board.

The differences from our board to custom P2020RDB-PC borad are:

1. we have 4GB DDR3 instead of 1GB DDR3 on custom board;

2. we have 64MB NOR Flash instead of 16MB NOR Flash on custom board.

 

And we built a 36-bit uboot and modified relevant uboot source code, as below:

#define CONFIG_SYS_TEXT_BASE 0xeff80000-------->0xfeff80000
#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc---------->0xfeffffffc
#define CONFIG_SYS_CCSRBAR 0xffe00000------------>0xffe00000

#define CONFIG_SYS_SDRAM_SIZE_LAWLAW_SIZE_1G------->LAW_SIZE_4G
#define CONFIG_CHIP_SELECTS_PER_CTRL1-------->2
#define CONFIG_SYS_MAX_FLASH_SECT128------>512

#define CONFIG_SYS_FLASH_BASE  0xef000000--------->0xec000000

 

We flash the uboot to the last 512kbit on NOR Flash, and when we boot the board, uboot printing msg as below:


U-Boot 2013.10 (Jun 19 2014 - 17:42:04)

CPU0:  P2020E, Version: 2.1, (0x80ea0021)
Core:  e500, Version: 5.1, (0x80211051)
Clock Configuration:
CPU0:1200 MHz, CPU1:1200 MHz,
CCB:600  MHz,
DDR:400  MHz (800 MT/s data rate) (Asynchronous), LBC:37.500 MHz
L1:    D-cache 32 KiB enabled
I-cache 32 KiB enabled
Board: MYP2020RDB CPLD: V4.1 PCBA: V4.0
rom_loc: nor upper bank
SD/MMC : 4-bit Mode
eSPI : Enabled                                                                 
I2C:   ready
SPI:   ready
DRAM:  DIMM 0: is not a DDR3 SPD.                                              
SPD error on controller 0! Trying fallback to raw timing calculation           
Detected UDIMM Fixed DDR on board
1 GiB (DDR3, 64-bit, CL=6, ECC off)        


And it stuck here, the DDR3 information shown in msg is still 1GB.

Is there any possible reason for this?

Is this a SPD problem or is there anything we missed when we modify the uboot.

We are looking forward to your advise.

 

Best Regards,

Hu      

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