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IMX6Q Interlaced TVIN bt656

Question asked by MATTHEW REYNOLDS on Apr 23, 2014
Latest reply on Jun 19, 2014 by MATTHEW REYNOLDS

Greetings,

 

I am working with a custom board based on the IMX6Q SaberSD.  Our board uses the 8-bit bt656 parallel input (without external HS/VS) and 8-bit bt656 output with interlaced NTSC video.   I got the output working from the patch (Patch to Support BT656 and BT1120 Output For i.MX6 BSP) but, am struggling with the parallel input.  I used the adv7180 driver as a reference and made a few modification to configure parallel mode and interlaced.  In the function ioctl_g_ifparm I set the "p->u.bt656.bt_sync_correct = 0;" to use internal syncs and set "p->u.bt656.clock_curr = 0;" so mxc_v4l2_capture.c will use IPU_CSI_CLK_MODE_CCIR656_INTERLACED.

 

Testing the video capture and preview with " /unit_tests/mxc_v4l2_tvin.out -ow 720 -oh 480 -ot 1 -ol 1 -f UYVY" there are a few issues with the video.

- It is continuously rolling vertically

- Colours are incorrect.  It looks like it is drawing in the wrong color space?

 

//My output device tree entry

bt656@0 {

        compatible = "fsl,bt656";

        ipu_id = <0>;

        disp_id = <0>;

        default_ifmt = "BT656";

        pinctrl-names = "default";

        pinctrl-0 = <&pinctrl_ipu1_1>;

        status = "okay";

    };

 

//My input device tree entry

    bt656In {

        compatible = "fsl,bt656in";

        pinctrl-names = "default";

        pinctrl-0 = <&pinctrl_ipu1_2>;

        clocks = <&clks 201>;

        clock-names = "csi_mclk";

        csi_id = <0>;

        mclk = <27000000>;

        mclk_source = <0>;

    };

 

Is there a problem with this configuration?  The only warning message printed is "imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001".  Below is the log of the mxc_v4l2_tvin.out test.

 

Sincerely,

Matthew

 

/unit_tests/mxc_v4l2_tvin.out -ow 720 -oh 480 -ot 0 -ol 1 -f UYVY
TV decoder chip is bt656_tvinIn mxc_v4l2_s_std b000

 

In mxc_v4l2_s_std b000
driver=mxc_vout, card=DISP3 FG, bus=, version=0x00030a11, capabilities=0x04000002
fmt RGB565: fourcc = 0x50424752
fmt BGR24: fourcc = 0x33524742
fmt RGB24: fourcc = 0x33424752
fmt RGB32: fourcc = 0x34424752
fmt BGR32: fourcc = 0x34524742
fmt NV12: fourcc = 0x3231564e
fmt UYVY: fourcc = 0x59565955
fmt YUYV: fourcc = 0x56595559
fmt YUV422 planar: fourcc = 0x50323234
fmt YUV444: fourcc = 0x34343459
fmt YUV420: fourcc = 0x32315559
fmt YVU420: fourcc = 0x32315659
fmt TILED NV12P: fourcc = 0x50564e54
fmt TILED NV12F: fourcc = 0x46564e54
fmt YUV444 planar: fourcc = 0x50343434
start time = 1398310913 s, 967905 us
imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001
imx-ipuv3 2400000.ipu: IPU Warning - IPU_INT_STAT_5 = 0x00000001

 


Edit

On further investigation I don't believe the foreground buffer, fb1 is initialized correctly.

# cat /sys/class/graphics/fb1/name

DISP3 FG

# cat /sys/class/graphics/fb1/mode

<empty.>

# cat /sys/class/graphics/fb1/modes

U:712x480p-13
U:240x320p-60

 

In the device tree I had set disp_dev = "off"; to mxcfb2, mxcfb3 and mxcfb3.  I am going to try to re-enable the hdmi device on mxcfb2.  Hopefully,  that will initialize the buffer and correct the video preview.

 

Edit 2:

A colour space conversion from the UYVY foreground layer to the bt656 RGB565 output seems to be the problem.  I got the foreground layer to display with correct colours by changing the fbpix format from RGB565 to UYVY16 using u-boot variables.  However, as a consequence the background layer does not draw correct, since it needs to be RGB565. 

 

In u-boot I changed the video variable from

video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=RGB565

to

video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=UYVY16


I am still not sure how to configure the system so the background and overlay display correct.

Outcomes