Our team is in the process of porting a CW7.1 project to CW10.5, however we've not yet been able to successfully get the code up and running completely. The issue we've encountered is that we continually run into exception errors. Aside from the exception errors, I'm experiencing an issue which is making if difficult to get to root cause. The problem is, when I step through the disassembly for a specific assembly function, "setintlevel" in this case, the "d1" register is not passed the value from "d0" on the initial instruction. In this particular case "d0" contains the expected value. This is a problem because "d1" is eventually used to update the "SR". I have experimented with adding a line, just below the "move.l d0,d1" where "d2" is passed the value from "d0" and that seems to work fine. For other calls to this function however, I see that "d0" contains garbage on entry to this function. The question I have is, has anyone seen situations where the general purpose registers are not updated as expected when viewing and stepping through the disassembly code in CW10.5? When I view and step through disassembly in CW7.1, registers change/update as I expect.
_setintlevel:
move.l d0,d1 ; fetch new level (0-7) passed
asl.l #8,d1 ; shift level into place
.if (HAS_RTXCms&&HAS_GLOBALPPL)
;
; while switching globalppl level raise to kernel ceiling
;
move.l pKWS,a0 ; load address of kernel workspace
move.w #SUPVMODE | (RTXC_LEVEL << 8),sr
move.l KWS_globalppl(a0),d0 ; get current priority level
asr.l #8,d0 ; shift level into place in D0 for return
move.l d1,KWS_globalppl(a0) ; save new processor priority level
.else
; set-up the return value.
; read bits 9,10 & 11 from the status register
; then shift down
move.w sr,d0
asr.l #8,d0
andi.l #7,d0
.endc ; HAS_RTXCms&&HAS_GLOBALPPL
ori.l #SUPVMODE,d1 ; set Supv bits
move.w d1,sr ; set processor to new level
rts ; return
_setintlevel_end:
FUNCTION "_setintlevel", _setintlevel, _setintlevel_end - _setintlevel
.end
Thanks