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Vybrid VF60 no output in JTAG boundary scan

Question asked by Roman Schnarwiler on Jan 28, 2014
Latest reply on Oct 5, 2016 by richard_stulens

Hi,

 

We are currently testing the Boundary Scan over JTAG on our Vybrid modules. We are currently using a VF60.

There are some issues.

We try to set output pins through JTAG boundary scan on Vybrid. We are using a Lauterbach JTAG adapter and our own JTAG solution. We are using the BSDL file attached here:

Debugging BSCAN test for Vybrid. Chip doesn't seem to respond correctly with this BSDL file

and in general it looks like it works. We are able to read the ID Code, we are even able to read from the pins (input). But we fail to set outputs. We set the corresponding output enable cell but the output doesn't change. We are able to change the value of this ball externally and can successfully read it back. Is there anything we have to set-up prior to being able to set output pins through JTAG?

 

One remark, as soon as we enter EXTEST mode, the RESETB / RESET_OUT signal gets asserted (0V). But this is normal I guess.

 

Do you have an idea what could be missing? Is there any JTAG boundary scan documentation or application note other than in the reference manual?


Unfortunately I couldn't test it on the Vybrid tower as I don't have a the right JTAG cables and adapters here.


Thanks for your help.


Roman

Toradex AG

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