Hi, Please give me Example of LPDDR2 Configuration. Best regards, soichi yamamoto
Additional notes I think that "VyBrid supports LPDDR2, Therefore, I do the operation check with LPDDR2 as a device". Please give me LPDDR2 Configuration at that time. There are a great many registers setting DDRMC. Therefore, please help me. Best regards, soichi yamamoto
Dear Alejandro,
Thank you for a reply.
The LPDDR2 Configuration is DDRMC = 200MHz.
I want use DDRMC = 400MHz
Please give me advice of necessary configuration register for clock 400MHz.
I am extremely grateful for your devoted support.
Best regards,
soichi
Dear Alejandro,
Thank you for a reply.
Please advise me.
Are the follows all right for the register to change for ”DDRMC = 200MHz => 400MHz ” ?
If there is a register adjusting it elsewhere, please tell me the register.
Best regards,
soichi
register | lpddr2_200mhz_ss-silicon' Configuration | DDRCK = 400MHz Configuration | JEDEC Parameter | |||||
Configuration Parameter | register | Parameter | Hex Value | Parameter | Hex Value | Symbol | Value | |
DDRMC_CR02 | 0x00000014 | TINIT | 100(ns) | 0x0014 | 100(ns) | 0x0028 | tINIT0 | 20ms |
DDRMC_CR03 | 0x00009C40 | TINIT3 | 200000(ns) | 0x9C40 | 200000(ns) | 0x00013880 | tINIT3 | 200us |
DDRMC_CR04 | 0x000000C8 | TINIT4 | 1000(ns) | 0x00C8 | 1000(ns) | 0x0190 | tINIT4 | 1us |
DDRMC_CR05 | 0x0000007D0 | TINIT5 | 10000(ns) | 0x07D0 | 10000(ns) | 0x0FA0 | tINIT5 | 10us |
DDRMC_CR12 | 0x00000106 | WRLAT | 1(tCK) | 0x0001 | 3(tCK) | 0x0003 | WL | 1(tCK) |
CASLAT_LIN | 3(tCK) | 0x0006 | 6(tCK) | 0x000C | RL | 3(tCK) | ||
DDRMC_CR13 | 0x0d020202 | TRC | 65(ns) | 0x000D | 65(ns) | 0x001A | tRAS tRPab | 27ns-70us 18ns-27ns |
TRRD | 10(ns) | 0x0002 | 10(ns) | 0x0004 | tRRD | 10ns | ||
DDRMC_CR14 | 0x0a040209 | TFAW | 50(ns) | 0x000A | 50(ns) | 0x0014 | tFAW | 50ns |
TWTR | 10(ns) | 0x0002 | 7.5(ns) | 0x0003 | tWTR | 7.5ns | ||
TRAS_MIN | 45(ns) | 0x0009 | 42(ns) | 0x0011 | tRAS | 42ns | ||
DDRMC_CR16 | 0x05020000 | TRTP | 10(ns) | 0x0002 | 7.5(ns) | 0x0003 | tRTP | 7.5ns |
DDRMC_CR17 | 0x0036b005 | TRAS_MAX | 70000(ns) | 0x36B0 | 70000(ns) | 0x6D60 | tRAS | 70us |
DDRMC_CR18 | 0x00000303 | TCKESR | 15(ns) | 0x0003 | 15(ns) | 0x0006 | tCKESR | 15ns |
DDRMC_CR21 | 0x00040101 | TRCD_INT | 20(ns) | 0x0004 | 18(ns) | 0x0008 | tRCD | 18ns |
DDRMC_CR22 | 0x00070000 | TDAL | 35(ns) | 0x0007 | 33(ns) | 0x000E | tRPab (4-bank) tWR | 18ns 15ns |
DDRMC_CR24 | 0x00000005 | TRP_AB | 25(ns) | 0x0005 | 21(ns) | 0x0009 | tRPab 8-bank | 21ns |
DDRMC_CR26 | 0x0610001a | TREF | 7760(ns) | 0x0610 | 7760(ns) | 0x0C20 | tREFI | 7.8us |
TRFC | 130(ns) | 0x001A | 130(ns) | 0x0034 | tRFCab | 130ns | ||
DDRMC_CR29 | 0x00000002 | TPDEX | 10(ns) | 0x0002 | 10(ns) | 0x0004 | tXP | 10ns |
DDRMC_CR31 | 0x001C001C | TXSNR | 140(ns) | 0x001C | 140(ns) | 0x0038 | tXSR | 140ns |
TXSR | 140(ns) | 0x001C | 140(ns) | 0x0038 | tXSR | 140ns | ||
DDRMC_CR66 | 0x004800c8 | ZQCL | 360(ns) | 0x0048 | 360(ns) | 0x0090 | tZQCL | 360ns |
ZQINIT | 1000(ns) | 0x00C8 | 1000(ns) | 0x0190 | tZQINIT | 1us | ||
DDRMC_CR67 | 0x00000012 | ZQCS | 90(ns) | 0x0012 | 90(ns) | 0x0024 | tZQCS | 90ns |
DDRMC_CR71 | 0x00000A00 | ZQRESET | 50(ns) | 0x000A | 50(ns) | 0x0014 | tZQRESET | 50ns |
DDRMC_CR92 | 0x00010200 | TDQSCK_MIN | 5(ns) | 0x0001 | 2.5(ns) | 0x0001 | tDQSCK(min) | 2.5ns |
TDQSCK_MAX | 10(ns) | 0x0002 | 5.5(ns) | 0x0003 | tDQSCK(MAX) | 5.5ns |
Hi, I was able to obtain a sample of 400MHzConfiguration from Local FAE. Thank you for support. soichi,
Hi Soichi,
I have been looking for the datasheet in the designer web page. But there is nothing, the one that fits the most is this one:
H9TKNNN1G
And the only information available are general specs:
Features
[ PoP ]
[ LPDDR2 S4B ]
I will try to get it from them.
Dear Alejandro,
Thank you for a wonderful reply.
I am extremely grateful for your devoted support.
Please tell me the Parts number of LPDDR2 for reference.
Best Regards,
soichi
Hi,
Looking at the validation board schematic I can see this part number:H9TCNNN1GBMMVR-NEM
I hope that helps.
Alejandro
Dear Alejandro, Thank you for a reply. Do you have H9TCNNN1GBMMVR-NEM's datasheet? If you have,please give me the LPDDR2's datasheet. I am extremely grateful for your devoted support. Best Regards, soichi